| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-02-06 | clk: tegra: dfll: CVB calculation alignment with the regulator | Joseph Lo |
| 2017-11-01 | clk: tegra: dfll: Fix drvdata overwriting issue | Nicolin Chen |
| 2016-04-28 | clk: tegra: dfll: Properly clean up on failure and removal | Thierry Reding |
| 2016-04-28 | clk: tegra: dfll: Reference CVB table instead of copying data | Thierry Reding |
| 2016-04-28 | clk: tegra: dfll: Update kerneldoc | Thierry Reding |
| 2015-07-16 | clk: tegra: Add Tegra124 DFLL clocksource platform driver | Tuomas Tynkkynen |
| 2015-07-16 | clk: tegra: Add library for the DFLL clock source (open-loop mode) | Tuomas Tynkkynen |
 |
index : linux.git | |
| Unnamed repository; edit this file 'description' to name the repository. |
| summaryrefslogtreecommitdiff |