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Age	Commit message (Expand)	Author
2016-06-15	MIPS: Clean up RDHWR handling	James Hogan
2015-04-10	MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.	Ralf Baechle
2014-09-22	MIPS: Use WSBH/DSBH/DSHD on Loongson 3A	Chen Jie
2014-05-30	MIPS: OCTEON: Enable use of FPU	David Daney
2012-10-11	MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.	Ralf Baechle
2012-09-13	MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.	Steven J. Hill
2011-09-24	MIPS: Octeon: Enable C0_UserLocal probing.	David Daney
2010-10-29	MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.	David Daney
2010-10-29	MIPS: Octeon: Adjust top of DMA32 zone.	David Daney
2010-08-05	MIPS: Octeon: Implement delays with cycle counter.	David Daney
2010-08-05	MIPS: Octeon: Define ARCH_HAS_USABLE_BUILTIN_POPCOUNT for OCTEON.	David Daney
2010-02-27	MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs	David Daney
2009-09-17	MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.	David Daney
2009-06-17	MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h	David Daney
2009-06-17	MIPS: Remove execution hazard barriers for Octeon.	David Daney
2009-01-11	MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.	David Daney