diff options
author | Chen Jie <chenj@lemote.com> | 2014-08-15 16:56:58 +0800 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-09-22 13:35:46 +0200 |
commit | 3c09bae43ba92a07a6a7b7d42360deb32d289cc0 (patch) | |
tree | 7648425d5b309e76a60612ca46ba4b88bfdf729b /arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | |
parent | 0f33be009b89d2268e94194dc4fd01a7851b6d51 (diff) |
MIPS: Use WSBH/DSBH/DSHD on Loongson 3A
Signed-off-by: chenj <chenj@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: chenhc@lemote.com
Patchwork: https://patchwork.linux-mips.org/patch/7542/
Patchwork: https://patchwork.linux-mips.org/patch/7550/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h')
-rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h index cf8022872892..fa1f3cfbae8d 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h @@ -57,6 +57,7 @@ #define cpu_has_vint 0 #define cpu_has_veic 0 #define cpu_hwrena_impl_bits 0xc0000000 +#define cpu_has_wsbh 1 #define cpu_has_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON) |