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authorJoseph Lo <josephl@nvidia.com>2019-05-29 16:21:33 +0800
committerThierry Reding <treding@nvidia.com>2020-05-12 22:48:41 +0200
commitcd4d6f357545bc03112265b19e5ed50592812986 (patch)
treec5c1e23047f2282d4b60353255a367d6b040964b /drivers/sh
parent3dcbd36fa34ce9124ec51accd835130251f74213 (diff)
clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210
Introduce the low jitter path of PLLP and PLLMB which can be used as EMC clock source. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/sh')
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