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authorTomasz Figa <t.figa@samsung.com>2013-04-04 13:33:27 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-04-04 15:51:15 +0900
commit8e79561c41ec7746361a1e9a079c7225e010515e (patch)
tree16812836bbe9d7086e57baf44df0a667c0062676 /drivers/clk
parent1554701528479c81240076b0c9251f4544be6319 (diff)
clk: exynos4: Add missing mout_sata on Exynos4210
This patch adds missing mout_sata that is a parent of div_sata clock. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/samsung/clk-exynos4.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 7e875a462d89..e572f62ec423 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -360,6 +360,7 @@ struct samsung_mux_clock exynos4210_mux_clks[] __initdata = {
MUX(none, "mout_mmc2", group1_p4210, SRC_FSYS, 8, 4),
MUX(none, "mout_mmc3", group1_p4210, SRC_FSYS, 12, 4),
MUX(none, "mout_mmc4", group1_p4210, SRC_FSYS, 16, 4),
+ MUX(none, "mout_sata", sclk_ampll_p4210, SRC_FSYS, 24, 1),
MUX(none, "mout_uart0", group1_p4210, SRC_PERIL0, 0, 4),
MUX(none, "mout_uart1", group1_p4210, SRC_PERIL0, 4, 4),
MUX(none, "mout_uart2", group1_p4210, SRC_PERIL0, 8, 4),