diff options
| author | Florian Fainelli <florian@openwrt.org> | 2012-01-31 18:18:45 +0100 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2012-08-22 23:46:38 +0200 |
| commit | 62cedc4fde2d15b08e4502aa3fb2d9d798f3ccd8 (patch) | |
| tree | fee5a50adcb7181d44bf4f3364d46883bc49dd35 /arch/mips/Kconfig | |
| parent | 91405eb69ee007ee854aa917e2a15e6ccede2cd1 (diff) | |
MIPS: introduce CPU_R4K_CACHE_TLB
R4K-style CPUs having common code to support their caches and tlb have this
boolean defined by default. Allows us to remove some lines in
arch/mips/mm/Makefile.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/3328/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 0920936fc67f..1dcbbd11b1db 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1888,6 +1888,10 @@ config CPU_R4K_FPU bool default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) +config CPU_R4K_CACHE_TLB + bool + default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) + choice prompt "MIPS MT options" |