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| author | Olof Johansson <olof@lixom.net> | 2019-11-06 07:42:02 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-11-06 07:42:04 -0800 |
| commit | ea21768a8a46cd1e2085d34fedfcda29eda7ceff (patch) | |
| tree | b41da456a5b888d2f6e97d0c757231b15a5f5e0c /arch/arm | |
| parent | f129230b8c1f12e308dae89209c8b0d28136e81d (diff) | |
| parent | 74ab6d9d7dce554a2b1265b06f2ceb4087406b6c (diff) | |
Merge tag 'sunxi-dt-for-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
A few more DT patches for 5.5, mostly:
- USB3 support for the H6
- Deinterlacer support for the H3
- eDP Bridge support on the Teres-I
- More DT cleanups thanks to the validation
* tag 'sunxi-dt-for-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Remove useless reset name
ARM: dts: sun6i: Remove useless reset-names
arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support
arm64: dts: allwinner: h6: add USB3 device nodes
dt-bindings: Add ANX6345 DP/eDP transmitter binding
arm64: dts: allwinner: a64: enable ANX6345 bridge on Teres-I
dts: arm: sun8i: h3: Enable deinterlace unit
ARM: dts: sunxi: h3/h5: Add MBUS controller node
dt-bindings: bus: sunxi: Add H3 MBUS compatible
Link: https://lore.kernel.org/r/58ad00a8-9579-4811-969a-a74e331ee9a2.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h3.dtsi | 13 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 |
3 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index bbeb743633c6..6a5033785a8b 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -469,7 +469,6 @@ <&ccu CLK_PLL_VIDEO1_2X>; clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1"; resets = <&ccu RST_AHB1_HDMI>; - reset-names = "ahb"; dma-names = "ddc-tx", "ddc-rx", "audio-tx"; dmas = <&dma 13>, <&dma 13>, <&dma 14>; status = "disabled"; diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 78356db14fbb..fe773c72a69b 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -120,6 +120,19 @@ }; soc { + deinterlace: deinterlace@1400000 { + compatible = "allwinner,sun8i-h3-deinterlace"; + reg = <0x01400000 0x20000>; + clocks = <&ccu CLK_BUS_DEINTERLACE>, + <&ccu CLK_DEINTERLACE>, + <&ccu CLK_DRAM_DEINTERLACE>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_DEINTERLACE>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + interconnects = <&mbus 9>; + interconnect-names = "dma-mem"; + }; + syscon: system-control@1c00000 { compatible = "allwinner,sun8i-h3-system-control"; reg = <0x01c00000 0x1000>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 8df29cd05b83..510f83fb234b 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -109,6 +109,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + dma-ranges; ranges; display_clocks: clock@1000000 { @@ -543,6 +544,14 @@ }; }; + mbus: dram-controller@1c62000 { + compatible = "allwinner,sun8i-h3-mbus"; + reg = <0x01c62000 0x1000>; + clocks = <&ccu 113>; + dma-ranges = <0x00000000 0x40000000 0xc0000000>; + #interconnect-cells = <1>; + }; + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; |