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| author | Pete Johanson <peter@peterjohanson.com> | 2020-09-09 23:10:22 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-09-09 23:10:22 -0400 |
| commit | 5005aa4cd488de1a5ea10702ba3d6263249ec4e2 (patch) | |
| tree | 4bbda28a7c5afbe7421a050dea7d7155f46f5af1 /app/boards/arm/planck | |
| parent | 050a6fac464b17a342031168f77df227a291216d (diff) | |
| parent | ceda57ddfd7b49dd61e8795c37cd678b69a4a76f (diff) | |
Merge pull request #166 from Nicell/boards/dz60rgb
Add DZ60RGB Rev1 Definition
Diffstat (limited to 'app/boards/arm/planck')
| -rw-r--r-- | app/boards/arm/planck/planck_rev6_defconfig | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/app/boards/arm/planck/planck_rev6_defconfig b/app/boards/arm/planck/planck_rev6_defconfig index a440ff1..e34ce00 100644 --- a/app/boards/arm/planck/planck_rev6_defconfig +++ b/app/boards/arm/planck/planck_rev6_defconfig @@ -20,9 +20,6 @@ CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y # use HSE as PLL input CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# however, the board does not have an external oscillator, so just use -# the 8MHz clock signal coming from integrated STLink -CONFIG_CLOCK_STM32_HSE_BYPASS=y # produce 72MHz clock at PLL output CONFIG_CLOCK_STM32_PLL_PREDIV=1 CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 |