Move Zephyr app into subdirectory.

1 files changed, 50 insertions, 0 deletions

diff --git a/app/boards/arm/planck/planck_rev6_defconfig b/app/boards/arm/planck/planck_rev6_defconfig
new file mode 100644
index 0000000..17330e2
--- /dev/null
+++ b/app/boards/arm/planck/planck_rev6_defconfig
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_STM32F3X=y
+CONFIG_SOC_STM32F303XC=y
+# 72MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
+
+# Floating Point Options
+CONFIG_FLOAT=y
+
+# enable uart driver
+CONFIG_SERIAL=y
+
+# enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+#enable I2C
+CONFIG_I2C=y
+
+#enable SPI
+CONFIG_SPI=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# kscan matrix
+CONFIG_KSCAN=y
+CONFIG_KSCAN_GPIO=y
+
+# Clock configuration for Cube Clock control driver
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# however, the board does not have an external oscillator, so just use
+# the 8MHz clock signal coming from integrated STLink
+CONFIG_CLOCK_STM32_HSE_BYPASS=y
+# produce 72MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_PREDIV=1
+CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32_APB2_PRESCALER=1