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| author | Nick <nick.win999@gmail.com> | 2020-09-15 14:41:59 -0500 |
|---|---|---|
| committer | Nick <nick.win999@gmail.com> | 2020-09-15 14:41:59 -0500 |
| commit | 18d21b0362c5c09902836ed4791bd13e1efd9a9a (patch) | |
| tree | 3f78a0ef43fc23e93195e1205a31f77154af7e76 /app/boards/arm/planck/planck_rev6_defconfig | |
| parent | 81bc157f539235ad032fde78b6f6cec7a16d2c39 (diff) | |
| parent | c0806d27f1d048db335ecc854eab61b59e23ea7a (diff) | |
Merge remote-tracking branch 'upstream/main' into underglow/state-persistence
Diffstat (limited to 'app/boards/arm/planck/planck_rev6_defconfig')
| -rw-r--r-- | app/boards/arm/planck/planck_rev6_defconfig | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/app/boards/arm/planck/planck_rev6_defconfig b/app/boards/arm/planck/planck_rev6_defconfig index a440ff1..e34ce00 100644 --- a/app/boards/arm/planck/planck_rev6_defconfig +++ b/app/boards/arm/planck/planck_rev6_defconfig @@ -20,9 +20,6 @@ CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y # use HSE as PLL input CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# however, the board does not have an external oscillator, so just use -# the 8MHz clock signal coming from integrated STLink -CONFIG_CLOCK_STM32_HSE_BYPASS=y # produce 72MHz clock at PLL output CONFIG_CLOCK_STM32_PLL_PREDIV=1 CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 |