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authorNick <nick.win999@gmail.com>2020-09-07 12:24:47 -0500
committerNick <nick.win999@gmail.com>2020-09-07 12:24:47 -0500
commit6b433fdefd0793e836574f528445b7d4b6d781bc (patch)
treef7cf6ea106010c01e51e8ec353a7b7ce1065da79 /app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig
parentfa40558f73ae0b7f693d93ec931aecf9d52167a1 (diff)
Finish DZ60RGB board definition
Diffstat (limited to 'app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig')
-rw-r--r--app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig3
1 files changed, 0 insertions, 3 deletions
diff --git a/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig b/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig
index 5a4c099..33840f9 100644
--- a/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig
+++ b/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig
@@ -19,9 +19,6 @@ CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
-# however, the board does not have an external oscillator, so just use
-# the 8MHz clock signal coming from integrated STLink
-CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV=1
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9