From 6b433fdefd0793e836574f528445b7d4b6d781bc Mon Sep 17 00:00:00 2001 From: Nick Date: Mon, 7 Sep 2020 12:24:47 -0500 Subject: Finish DZ60RGB board definition --- app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig | 3 --- 1 file changed, 3 deletions(-) (limited to 'app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig') diff --git a/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig b/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig index 5a4c099..33840f9 100644 --- a/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig +++ b/app/boards/arm/dz60rgb/dz60rgb_rev1_defconfig @@ -19,9 +19,6 @@ CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y # use HSE as PLL input CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# however, the board does not have an external oscillator, so just use -# the 8MHz clock signal coming from integrated STLink -CONFIG_CLOCK_STM32_HSE_BYPASS=y # produce 72MHz clock at PLL output CONFIG_CLOCK_STM32_PLL_PREDIV=1 CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 -- cgit v1.2.3