blob: 5e25d12dab0e1b131c94d78617864a1a4a13c328 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
|
#include "config.h"
ENTRY(start)
#ifdef ROCKBOX_LITTLE_ENDIAN
OUTPUT_FORMAT(elf32-littlearm)
#else
OUTPUT_FORMAT(elf32-bigarm)
#endif
OUTPUT_ARCH(arm)
STARTUP(target/arm/rk27xx/crt0.o)
#define DRAMORIG 0x60700000
#define DRAMSIZE (MEMORYSIZE * 0x100000 - 0x700000)
#define IRAMORIG 0x00000000
#define IRAMSIZE 4K
MEMORY
{
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
}
SECTIONS
{
.relocstart (NOLOAD) : {
_relocstart = .;
} > DRAM
.text : {
*(.init.text)
*(.text*)
*(.icode*)
*(.glue_7*)
} > DRAM
.intvect : {
_intvectstart = . ;
KEEP(*(.intvect))
_intvectend = . ;
} > IRAM AT > DRAM
_intvectcopy = LOADADDR(.intvect) ;
.rodata : {
*(.rodata*)
*(.irodata*)
. = ALIGN(0x4);
} > DRAM
.data : {
*(.data*)
*(.idata*)
. = ALIGN(0x4);
} > DRAM
.relocend (NOLOAD) : {
_relocend = .;
} > DRAM
.stack (NOLOAD) :
{
*(.stack)
_stackbegin = .;
stackbegin = .;
. += 0x2000;
_stackend = .;
stackend = .;
_irqstackbegin = .;
. += 0x400;
_irqstackend = .;
_fiqstackbegin = .;
. += 0x400;
_fiqstackend = .;
} > DRAM
.bss (NOLOAD) : {
_edata = .;
*(.bss*);
*(.ibss);
*(COMMON);
. = ALIGN(0x4);
_end = .;
} > DRAM
}
|