blob: e6c2b255dd96563f13687368edf68b259ac18866 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
|
/* Will have been included from app.lds */
ENTRY(start)
OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm)
STARTUP(target/arm/pp/crt0-pp.o)
#define PLUGINSIZE PLUGIN_BUFFER_SIZE
#define CODECSIZE CODEC_SIZE
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - CODECSIZE
#define DRAMORIG 0x00000000
#define IRAMORIG 0x40000000
#define IRAMSIZE 0xc000
#ifdef CPU_PP502x
#define NOCACHE_BASE 0x10000000
#else
#define NOCACHE_BASE 0x28000000
#endif
#define CACHEALIGN_SIZE 16
/* End of the audio buffer, where the codec buffer starts */
#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
/* Where the codec buffer ends, and the plugin buffer starts */
#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
MEMORY
{
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
}
SECTIONS
{
.text :
{
loadaddress = .;
_loadaddress = .;
. = ALIGN(0x200);
*(.init.text)
*(.text*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(0x4);
} > DRAM
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
. = ALIGN(0x4);
} > DRAM
.data :
{
*(.data*)
. = ALIGN(0x4);
} > DRAM
#if NOCACHE_BASE != 0
/* .ncdata section is placed at uncached physical alias address and is
* loaded at the proper cached virtual address - no copying is
* performed in the init code */
.ncdata . + NOCACHE_BASE :
{
. = ALIGN(CACHEALIGN_SIZE);
*(.ncdata*)
. = ALIGN(CACHEALIGN_SIZE);
} AT> DRAM
#endif
/DISCARD/ :
{
*(.eh_frame)
}
.vectors 0x0 :
{
_vectorsstart = .;
KEEP(*(.vectors));
_vectorsend = .;
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
_noloaddram = LOADADDR(.vectors);
.ibss IRAMORIG (NOLOAD) :
{
_iedata = .;
*(.qharray)
*(.ibss*)
. = ALIGN(0x4);
_iend = .;
} > IRAM
.iram _iend :
{
_iramstart = .;
*(.icode*)
*(.irodata*)
*(.idata*)
. = ALIGN(0x4);
_iramend = .;
} > IRAM AT> DRAM
_iramcopy = LOADADDR(.iram);
.init ENDAUDIOADDR :
{
. = ALIGN(4);
_initstart = .;
*(.init*)
_initend = .;
} AT> DRAM
_initcopy = LOADADDR(.init);
.idle_stacks (NOLOAD) :
{
*(.idle_stacks)
#if NUM_CORES > 1
cpu_idlestackbegin = .;
. += IDLE_STACK_SIZE;
cpu_idlestackend = .;
#endif
cop_idlestackbegin = .;
. += IDLE_STACK_SIZE;
cop_idlestackend = .;
} > IRAM
.stack (NOLOAD) :
{
*(.stack)
stackbegin = .;
. += 0x2000;
stackend = .;
} > IRAM
/* .bss and .ncbss are treated as a single section to use one init loop to
* zero it - note "_edata" and "_end" */
.bss _noloaddram (NOLOAD) :
{
_edata = .;
*(.bss*)
*(COMMON)
. = ALIGN(0x4);
} > DRAM
#if NOCACHE_BASE != 0
.ncbss . + NOCACHE_BASE (NOLOAD):
{
. = ALIGN(CACHEALIGN_SIZE);
*(.ncbss*)
. = ALIGN(CACHEALIGN_SIZE);
} AT> DRAM
#endif
/* This will be aligned by preceding alignments */
.endaddr . - NOCACHE_BASE (NOLOAD) :
{
_end = .;
} > DRAM
.audiobuf (NOLOAD) :
{
_audiobuffer = .;
. = ALIGN(0x4);
audiobuffer = .;
} > DRAM
.audiobufend ENDAUDIOADDR (NOLOAD) :
{
#ifdef IPOD_VIDEO
audiobufend_lds = .;
#else
audiobufend = .;
#endif
_audiobufend = .;
} > DRAM
.codec ENDAUDIOADDR (NOLOAD) :
{
codecbuf = .;
_codecbuf = .;
}
.plugin ENDADDR (NOLOAD) :
{
_pluginbuf = .;
pluginbuf = .;
}
}
|
