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/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2002 by Alan Korr
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include <stdbool.h>
#include "system.h"
#define LCDR (PBDR_ADDR+1)
#ifdef HAVE_LCD_CHARCELLS
#define LCD_DS 1 // PB0 = 1 --- 0001 --- LCD-DS
#define LCD_CS 2 // PB1 = 1 --- 0010 --- /LCD-CS
#define LCD_SD 4 // PB2 = 1 --- 0100 --- LCD-SD
#define LCD_SC 8 // PB3 = 1 --- 1000 --- LCD-SC
#else
#define LCD_SD 1 // PB0 = 1 --- 0001
#define LCD_SC 2 // PB1 = 1 --- 0010
#define LCD_RS 4 // PB2 = 1 --- 0100
#define LCD_CS 8 // PB3 = 1 --- 1000
#define LCD_DS LCD_RS
#endif
/*
* About /CS,DS,SC,SD
* ------------------
*
* LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines)
*
* - /CS -> Chip Selection line :
* 0 : LCD chipset is activated.
* - DS -> Data Selection line, latched at the rising edge
* of the 8th serial clock (*) :
* 0 : instruction register,
* 1 : data register;
* - SC -> Serial Clock line (SDA).
* - SD -> Serial Data line (SCK), latched at the rising edge
* of each serial clock (*).
*
* _ _
* /CS \ /
* \______________________________________________________/
* _____ ____ ____ ____ ____ ____ ____ ____ ____ _____
* SD \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/
* _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____
*
* _____ _ _ _ _ _ _ _ ________
* SC \ * \ * \ * \ * \ * \ * \ * \ *
* \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
* _ _________________________________________________________
* DS \/
* _/\_________________________________________________________
*
*/
/*
* The only way to do logical operations in an atomic way
* on SH1 is using :
*
* or.b/and.b/tst.b/xor.b #imm,@(r0,gbr)
*
* but GCC doesn't generate them at all so some assembly
* codes are needed here.
*
* The Global Base Register gbr is expected to be zero
* and r0 is the address of one register in the on-chip
* peripheral module.
*
*/
void lcd_write(bool command, int byte) __attribute__ ((section (".icode")));
void lcd_write(bool command, int byte)
{
asm("and.b %0, @(r0,gbr)"
:
: /* %0 */ "I"(~(LCD_CS|LCD_DS|LCD_SD|LCD_SC)),
/* %1 */ "z"(LCDR));
if (command)
asm ("shll8 %0\n"
"0: \n\t"
"and.b %2,@(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3,@(r0,gbr)\n"
"1: \n\t"
"or.b %4,@(r0,gbr)\n"
"add #-1,%1\n\t"
"cmp/pl %1\n\t"
"bt 0b"
:
: /* %0 */ "r"(((unsigned)byte)<<16),
/* %1 */ "r"(8),
/* %2 */ "I"(~(LCD_SC|LCD_SD|LCD_DS)),
/* %3 */ "I"(LCD_SD),
/* %4 */ "I"(LCD_SC),
/* %5 */ "z"(LCDR));
else
asm ("shll8 %0\n"
"0: \n\t"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
"and.b %2, @(r0,gbr)\n\t"
"shll %0\n\t"
"bf 1f\n\t"
"or.b %3, @(r0,gbr)\n"
"1: \n\t"
"or.b %4, @(r0,gbr)\n"
:
: /* %0 */ "r"(((unsigned)byte)<<16),
/* %1 */ "r"(8),
/* %2 */ "I"(~(LCD_SC|LCD_SD)),
/* %3 */ "I"(LCD_SD|LCD_DS),
/* %4 */ "I"(LCD_SC|LCD_DS),
/* %5 */ "z"(LCDR));
asm("or.b %0, @(r0,gbr)"
:
: /* %0 */ "I"(LCD_CS|LCD_DS|LCD_SD|LCD_SC),
/* %1 */ "z"(LCDR));
}
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