summaryrefslogtreecommitdiff
path: root/firmware/drivers/isp1362.c
blob: 473c9dc3db7d3407095579ff94a1ed0ac9843ffa (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * $Id$
 *
 * Copyright (C) 2006 Jens Arnold
 *
 * All files in this archive are subject to the GNU General Public License.
 * See the file COPYING in the source tree root for full license agreement.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/

#include "system.h"
#include "kernel.h"
#include "isp1362.h"

#define HC_DATA (*((volatile unsigned short*)0xc0000000))
#define HC_CMD  (*((volatile unsigned short*)0xc0000002))
#define DC_DATA (*((volatile unsigned short*)0xc0000004))
#define DC_CMD  (*((volatile unsigned short*)0xc0000006))

/* host controller access */

unsigned isp1362_read_hc_reg16(unsigned reg)
{
    HC_CMD = reg;

    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");

    return HC_DATA;
}

unsigned isp1362_read_hc_reg32(unsigned reg)
{
    unsigned data;

    HC_CMD = reg;

    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");

    data = HC_DATA;
    data |= HC_DATA << 16;
    return data;
}

void isp1362_write_hc_reg16(unsigned reg, unsigned data)
{
    HC_CMD = reg | 0x80;

    asm ("nop\n nop\n nop\n");

    HC_DATA = data;
}

void isp1362_write_hc_reg32(unsigned reg, unsigned data)
{
    HC_CMD = reg | 0x80;

    asm ("nop\n nop\n nop\n");

    HC_DATA = data;
    HC_DATA = data >> 16;
}

/* device controller access */

unsigned isp1362_read_dc_reg16(unsigned reg)
{
    DC_CMD = reg;

    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");

    return DC_DATA;
}

unsigned isp1362_read_dc_reg32(unsigned reg)
{
    unsigned data;

    DC_CMD = reg;

    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");
    asm ("nop\n nop\n nop\n nop\n");

    data = DC_DATA;
    data |= DC_DATA << 16;
    return data;
}

void isp1362_write_dc_reg16(unsigned reg, unsigned data)
{
    DC_CMD = reg;

    asm ("nop\n nop\n nop\n");

    DC_DATA = data;
}

void isp1362_write_dc_reg32(unsigned reg, unsigned data)
{
    DC_CMD = reg;

    asm ("nop\n nop\n nop\n");

    DC_DATA = data;
    DC_DATA = data >> 16;
}

static void isp1362_suspend(void)
{
    unsigned data;

    data = isp1362_read_hc_reg16(ISP1362_OTG_CONTROL);
    data &= ~0x0001;  /* DRV_VBUS = 0 */
    isp1362_write_hc_reg16(ISP1362_OTG_CONTROL, data);

    /* prepare the DC */
    data = isp1362_read_dc_reg16(ISP1362_DC_HARDWARE_CONFIG_R);
    data &= ~0x1008;  /* CLKRUN = WKUPCS = 0. Wakeup is still possible via /D_WAKEUP */
    isp1362_write_dc_reg16(ISP1362_DC_HARDWARE_CONFIG_W, data);

    /* send the DC to sleep */
    data = isp1362_read_dc_reg16(ISP1362_DC_MODE_R);
    data |=  0x20;  /* GOSUSP = 1 */
    isp1362_write_dc_reg16(ISP1362_DC_MODE_W, data);
    data &= ~0x20;  /* GOSUSP = 0 */
    isp1362_write_dc_reg16(ISP1362_DC_MODE_W, data);

    /* prepare the HC */
    data = isp1362_read_hc_reg16(ISP1362_HC_HARDWARE_CONFIG);
    data &= ~0x0800;  /* SuspendClkNotStop = 0 */
    data |=  0x4001;  /* GlobalPowerDown = InterruptPinEnable = 1 */
    isp1362_write_hc_reg16(ISP1362_HC_HARDWARE_CONFIG, data);

    /* TODO: OTG wake-up cfg */
    /* TODO: Interrupt setup */
    
    /* set the HC to operational */
    isp1362_write_hc_reg32(ISP1362_HC_CONTROL, 0x0680);
                           /* RWE = RWC = 1, HCFS = 0b10 (USBOperational) */
    /* ..then send it to sleep */
    isp1362_write_hc_reg32(ISP1362_HC_CONTROL, 0x06c0);
                           /* RWE = RWC = 1, HCFS = 0b11 (USBSuspend) */
}

/* init */

void isp1362_init(void)
{
    and_l(~0x00200080, &GPIO1_OUT);     /* disable 5V USB host power and ??? */
    or_l(  0x00200080, &GPIO1_ENABLE);
    or_l(  0x00200080, &GPIO1_FUNCTION);

    or_l(  0x20600000, &GPIO_OUT);      /* ID = D_SUSPEND = /OTGMODE = 1 */
    and_l(~0x04000000, &GPIO_OUT);      /* ?R26? = 0 */
    or_l(  0x24600000, &GPIO_ENABLE);   /* ID, ?R26?, D_SUSPEND, /OTGMODE outputs */
    and_l(~0x000000a8, &GPIO_ENABLE);   /* /INT2, /INT1, /RESET inputs */
    or_l(  0x246000a8, &GPIO_FUNCTION); /* GPIO for these pins */

    sleep(HZ/5);

    isp1362_suspend();
}