1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
|
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2002 by Alan Korr
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include <stdbool.h>
#include "ata.h"
#include "kernel.h"
#include "led.h"
#include "sh7034.h"
#include "system.h"
#include "debug.h"
#include "panic.h"
#define SECTOR_SIZE 512
#define ATA_DATA (*((volatile unsigned short*)0x06104100))
#define ATA_ERROR (*((volatile unsigned char*)0x06100101))
#define ATA_FEATURE ATA_ERROR
#define ATA_NSECTOR (*((volatile unsigned char*)0x06100102))
#define ATA_SECTOR (*((volatile unsigned char*)0x06100103))
#define ATA_LCYL (*((volatile unsigned char*)0x06100104))
#define ATA_HCYL (*((volatile unsigned char*)0x06100105))
#define ATA_SELECT (*((volatile unsigned char*)0x06100106))
#define ATA_COMMAND (*((volatile unsigned char*)0x06100107))
#define ATA_STATUS (*((volatile unsigned char*)0x06100107))
#define ATA_CONTROL1 ((volatile unsigned char*)0x06200206)
#define ATA_CONTROL2 ((volatile unsigned char*)0x06200306)
#define ATA_CONTROL (*ata_control)
#define ATA_ALT_STATUS ATA_CONTROL
#define SELECT_DEVICE1 0x10
#define SELECT_LBA 0x40
#define STATUS_BSY 0x80
#define STATUS_RDY 0x40
#define STATUS_DRQ 0x08
#define STATUS_ERR 0x01
#define CONTROL_nIEN 0x02
#define CONTROL_SRST 0x04
#define CMD_READ_SECTORS 0x20
#define CMD_WRITE_SECTORS 0x30
#define CMD_STANDBY_IMMEDIATE 0xE0
#define CMD_STANDBY 0xE2
#define CMD_SLEEP 0xE6
#define CMD_SECURITY_FREEZE_LOCK 0xF5
static struct mutex ata_mtx;
char ata_device; /* device 0 (master) or 1 (slave) */
int ata_io_address; /* 0x300 or 0x200, only valid on recorder */
static volatile unsigned char* ata_control;
bool old_recorder = false;
static int wait_for_bsy(void)
{
int timeout = current_tick + HZ*4;
while (TIME_BEFORE(current_tick, timeout) && (ATA_ALT_STATUS & STATUS_BSY))
yield();
if (TIME_BEFORE(current_tick, timeout))
{
return 1;
}
else
{
return 0; /* timeout */
}
}
static int wait_for_rdy(void)
{
if (!wait_for_bsy())
return 0;
return ATA_ALT_STATUS & STATUS_RDY;
}
static int wait_for_start_of_transfer(void)
{
if (!wait_for_bsy())
return 0;
return (ATA_ALT_STATUS & (STATUS_BSY|STATUS_DRQ)) == STATUS_DRQ;
}
static int wait_for_end_of_transfer(void)
{
if (!wait_for_bsy())
return 0;
return (ATA_ALT_STATUS & (STATUS_RDY|STATUS_DRQ)) == STATUS_RDY;
}
int ata_read_sectors(unsigned long start,
unsigned char count,
void* buf)
{
int i;
int ret = 0;
mutex_lock(&ata_mtx);
if (!wait_for_rdy())
{
mutex_unlock(&ata_mtx);
return -1;
}
led(true);
ATA_NSECTOR = count;
ATA_SECTOR = start & 0xff;
ATA_LCYL = (start >> 8) & 0xff;
ATA_HCYL = (start >> 16) & 0xff;
ATA_SELECT = ((start >> 24) & 0xf) | SELECT_LBA | ata_device;
ATA_COMMAND = CMD_READ_SECTORS;
for (i=0; i<count; i++) {
int j;
if (!wait_for_start_of_transfer())
{
mutex_unlock(&ata_mtx);
return -1;
}
for (j=0; j<SECTOR_SIZE/2; j++)
((unsigned short*)buf)[j] = SWAB16(ATA_DATA);
#ifdef USE_INTERRUPT
/* reading the status register clears the interrupt */
j = ATA_STATUS;
#endif
buf += SECTOR_SIZE; /* Advance one sector */
}
led(false);
if(!wait_for_end_of_transfer())
ret = -1;
mutex_unlock(&ata_mtx);
return ret;
}
#ifdef DISK_WRITE
int ata_write_sectors(unsigned long start,
unsigned char count,
void* buf)
{
int i;
mutex_lock(&ata_mtx);
if (!wait_for_rdy())
{
mutex_unlock(&ata_mtx);
return 0;
}
led(true);
ATA_NSECTOR = count;
ATA_SECTOR = start & 0xff;
ATA_LCYL = (start >> 8) & 0xff;
ATA_HCYL = (start >> 16) & 0xff;
ATA_SELECT = ((start >> 24) & 0xf) | SELECT_LBA | ata_device;
ATA_COMMAND = CMD_WRITE_SECTORS;
for (i=0; i<count; i++) {
int j;
if (!wait_for_start_of_transfer())
{
mutex_unlock(&ata_mtx);
return 0;
}
for (j=0; j<SECTOR_SIZE/2; j++)
ATA_DATA = SWAB16(((unsigned short*)buf)[j]);
#ifdef USE_INTERRUPT
/* reading the status register clears the interrupt */
j = ATA_STATUS;
#endif
buf += SECTOR_SIZE;
}
led(false);
i = wait_for_end_of_transfer();
mutex_unlock(&ata_mtx);
return i;
}
#endif
static int check_registers(void)
{
if ( ATA_STATUS & STATUS_BSY )
return -1;
ATA_NSECTOR = 0xa5;
ATA_SECTOR = 0x5a;
ATA_LCYL = 0xaa;
ATA_HCYL = 0x55;
if ((ATA_NSECTOR == 0xa5) &&
(ATA_SECTOR == 0x5a) &&
(ATA_LCYL == 0xaa) &&
(ATA_HCYL == 0x55))
return 0;
return -2;
}
static int freeze_lock(void)
{
if (!wait_for_rdy())
return -1;
ATA_COMMAND = CMD_SECURITY_FREEZE_LOCK;
if (!wait_for_rdy())
return -1;
return 0;
}
int ata_spindown(int time)
{
int ret = 0;
mutex_lock(&ata_mtx);
if(!wait_for_rdy())
{
mutex_unlock(&ata_mtx);
return -1;
}
if ( time == -1 ) {
ATA_COMMAND = CMD_STANDBY_IMMEDIATE;
}
else {
if (time > 255)
{
mutex_unlock(&ata_mtx);
return -1;
}
ATA_NSECTOR = time & 0xff;
ATA_COMMAND = CMD_STANDBY;
}
if (!wait_for_rdy())
ret = -1;
mutex_unlock(&ata_mtx);
return ret;
}
int ata_hard_reset(void)
{
int ret;
mutex_lock(&ata_mtx);
PADR &= ~0x0200;
sleep(2);
PADR |= 0x0200;
ret = wait_for_rdy();
/* Massage the return code so it is 0 on success and -1 on failure */
ret = ret?0:-1;
mutex_unlock(&ata_mtx);
return ret;
}
int ata_soft_reset(void)
{
int ret;
int retry_count;
mutex_lock(&ata_mtx);
ATA_SELECT = SELECT_LBA | ata_device;
ATA_CONTROL = CONTROL_nIEN|CONTROL_SRST;
sleep(HZ/20000); /* >= 5us */
ATA_CONTROL = CONTROL_nIEN;
sleep(HZ/400); /* >2ms */
/* This little sucker can take up to 30 seconds */
retry_count = 8;
do
{
ret = wait_for_rdy();
} while(!ret && retry_count--);
/* Massage the return code so it is 0 on success and -1 on failure */
ret = ret?0:-1;
mutex_unlock(&ata_mtx);
return ret;
}
static int master_slave_detect(void)
{
/* master? */
ATA_SELECT = 0;
if ( ATA_STATUS & STATUS_RDY ) {
ata_device = 0;
DEBUGF("Found master harddisk\n");
}
else {
/* slave? */
ATA_SELECT = SELECT_DEVICE1;
if ( ATA_STATUS & STATUS_RDY ) {
ata_device = SELECT_DEVICE1;
DEBUGF("Found slave harddisk\n");
}
else
return -1;
}
return 0;
}
static int io_address_detect(void)
{
unsigned char tmp = ATA_STATUS & 0xf9; /* Mask the IDX and CORR bits */
unsigned char dummy;
/* We compare the STATUS register with the ALT_STATUS register, which
is located at the same address as CONTROL. If they are the same, we
assume that we have the correct address.
We can't read the ATA_STATUS directly, since the read data will stay
on the data bus if the following read does not assert the Chip Select
to the ATA controller. We read a register that we know exists to make
sure that the data on the bus isn't identical to the STATUS register
contents. */
ATA_SECTOR = 0;
dummy = ATA_SECTOR;
if(tmp == ((*ATA_CONTROL2) & 0xf9))
{
DEBUGF("CONTROL is at 0x306\n");
ata_io_address = 0x300; /* For debug purposes only */
old_recorder = true;
ata_control = ATA_CONTROL2;
}
else
{
DEBUGF("CONTROL is at 0x206\n");
ata_io_address = 0x200; /* For debug purposes only */
old_recorder = false;
ata_control = ATA_CONTROL1;
}
/* Let's check again, to be sure */
if(tmp != ATA_CONTROL)
{
DEBUGF("ATA I/O address detection failed\n");
return -1;
}
return 0;
}
void ata_enable(bool on)
{
if(on)
PADR &= ~0x80; /* enable ATA */
else
PADR |= 0x80; /* disable ATA */
PAIOR |= 0x80;
}
int ata_init(void)
{
mutex_init(&ata_mtx);
led(false);
ata_enable(true);
if (master_slave_detect())
return -1;
if (io_address_detect())
return -2;
if (check_registers())
return -3;
if (freeze_lock())
return -4;
if (ata_spindown(1))
return -5;
ATA_SELECT = SELECT_LBA;
ATA_CONTROL = CONTROL_nIEN;
return 0;
}
|