Age | Commit message (Collapse) | Author |
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The old timrot setup API was very low-level and unfriendly. The new one
makes in easier to select the frequency source. Use to simplify timer
and kernel timer code.
Change-Id: Iffcdf11c00e925be9ec8d9a4efc74b197b6bd2aa
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NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
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Change-Id: Ic803a6b5c93978cd3246e553579ac8a1ba35e191
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The current code was spreaded over power and powermgmt which made
it behave strangely, especially since there are relationships
between power management and frequency scaling. The new code makes
sure power management is initialised before frequency scaling
starts. It also makes sure to start from a known state, thus
fixing potential issue when the bootloader stops in a trickle
state where DCDC is improperly configured.
Change-Id: Ibded2e590e108f6c98daa52d2cf1bd28763c8923
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Change-Id: Ia6dc7ac7e1fdf471a518111f5593bd96bc3acfac
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The current code uses the msec irq to collect statistics and
detect irq storms (debug). But this irq is triggered 1000 times
per sec and we don't need that accuracy. This commit removes the
msec irq and use the tick timer instead which is triggered only
100 times per second.
Change-Id: If14b9503c89a3af370ef322678f10e35fafb4b8a
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Change-Id: I9f721ae12a3ddf72c4e90ad0754a5c2b819847bb
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accordingly
Change-Id: Ia229e5303692712295f1dbd37a76f865a3eef4ea
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kernel-imx233
Change-Id: I2bc5a49459c354027fc67a880bbf3b87c942bdd0
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timrot against irq
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30437 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29808 a1c6a512-1295-4272-9138-f99709370657
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