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-rw-r--r--firmware/SOURCES3
-rw-r--r--firmware/export/timer.h6
-rw-r--r--firmware/target/arm/as3525/timer-target.h2
-rw-r--r--firmware/target/arm/at91sam/lyre_proto1/timer-target.h2
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/timer-target.h2
-rw-r--r--firmware/target/arm/pnx0101/timer-target.h2
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h2
-rw-r--r--firmware/target/arm/tcc780x/timer-target.h2
-rw-r--r--firmware/target/arm/tms320dm320/timer-target.h2
-rw-r--r--firmware/target/coldfire/timer-target.h2
-rw-r--r--firmware/target/mips/ingenic_jz47xx/timer-target.h2
-rw-r--r--firmware/target/sh/archos/timer-archos.c85
-rw-r--r--firmware/target/sh/archos/timer-target.h41
-rw-r--r--firmware/timer.c61
14 files changed, 147 insertions, 67 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES
index b2fbfa13f2..239eb92a92 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -461,6 +461,7 @@ drivers/i2c.c
#ifdef ARCHOS_PLAYER
#ifndef SIMULATOR
target/sh/archos/ata-archos.c
+target/sh/archos/timer-archos.c
target/sh/archos/ata-as-archos.S
target/sh/archos/player/button-player.c
target/sh/archos/player/hwcompat-player.c
@@ -475,6 +476,7 @@ target/sh/archos/player/usb-player.c
#ifdef ARCHOS_RECORDER
#ifndef SIMULATOR
target/sh/archos/ata-archos.c
+target/sh/archos/timer-archos.c
target/sh/archos/ata-as-archos.S
target/sh/archos/lcd-archos-bitmap.c
target/sh/archos/lcd-as-archos-bitmap.S
@@ -488,6 +490,7 @@ target/sh/archos/recorder/usb-recorder.c
#if defined(ARCHOS_FMRECORDER) || defined(ARCHOS_RECORDERV2)
#ifndef SIMULATOR
target/sh/archos/ata-archos.c
+target/sh/archos/timer-archos.c
target/sh/archos/ata-as-archos.S
target/sh/archos/lcd-archos-bitmap.c
target/sh/archos/lcd-as-archos-bitmap.S
diff --git a/firmware/export/timer.h b/firmware/export/timer.h
index b758f57ae5..f3faf0908e 100644
--- a/firmware/export/timer.h
+++ b/firmware/export/timer.h
@@ -31,11 +31,13 @@
#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 \
|| defined(CPU_TCC77X) || CONFIG_CPU == AS3525 || CONFIG_CPU == IMX31L \
|| CONFIG_CPU == JZ4732 || CONFIG_CPU == PNX0101 \
- || defined(CPU_COLDFIRE)
+ || defined(CPU_COLDFIRE) || CONFIG_CPU == SH7034
#include "timer-target.h"
#elif defined(SIMULATOR)
#define TIMER_FREQ 1000000
-#else
+#endif
+
+#ifndef TIMER_FREQ
#define TIMER_FREQ CPU_FREQ
#endif
bool timer_register(int reg_prio, void (*unregister_callback)(void),
diff --git a/firmware/target/arm/as3525/timer-target.h b/firmware/target/arm/as3525/timer-target.h
index b1bdfed78f..d42afaa2c4 100644
--- a/firmware/target/arm/as3525/timer-target.h
+++ b/firmware/target/arm/as3525/timer-target.h
@@ -30,7 +30,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/arm/at91sam/lyre_proto1/timer-target.h b/firmware/target/arm/at91sam/lyre_proto1/timer-target.h
index b8298d3d77..1db63c5211 100644
--- a/firmware/target/arm/at91sam/lyre_proto1/timer-target.h
+++ b/firmware/target/arm/at91sam/lyre_proto1/timer-target.h
@@ -32,7 +32,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/arm/imx31/gigabeat-s/timer-target.h b/firmware/target/arm/imx31/gigabeat-s/timer-target.h
index f019a45519..4ea459719c 100644
--- a/firmware/target/arm/imx31/gigabeat-s/timer-target.h
+++ b/firmware/target/arm/imx31/gigabeat-s/timer-target.h
@@ -31,7 +31,7 @@ void _timer_stop(void);
#define __TIMER_SET(cycles, set) \
_timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
_timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/arm/pnx0101/timer-target.h b/firmware/target/arm/pnx0101/timer-target.h
index 853da07838..68d0e6b58a 100644
--- a/firmware/target/arm/pnx0101/timer-target.h
+++ b/firmware/target/arm/pnx0101/timer-target.h
@@ -30,7 +30,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h
index 700833486d..577d0f947c 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h
@@ -32,7 +32,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/arm/tcc780x/timer-target.h b/firmware/target/arm/tcc780x/timer-target.h
index d6a8c4b0aa..c477ca6c70 100644
--- a/firmware/target/arm/tcc780x/timer-target.h
+++ b/firmware/target/arm/tcc780x/timer-target.h
@@ -31,7 +31,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/arm/tms320dm320/timer-target.h b/firmware/target/arm/tms320dm320/timer-target.h
index 9f3ffdf712..072f7e06a9 100644
--- a/firmware/target/arm/tms320dm320/timer-target.h
+++ b/firmware/target/arm/tms320dm320/timer-target.h
@@ -31,7 +31,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/coldfire/timer-target.h b/firmware/target/coldfire/timer-target.h
index 29488887e8..c7f695a0c8 100644
--- a/firmware/target/coldfire/timer-target.h
+++ b/firmware/target/coldfire/timer-target.h
@@ -31,7 +31,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/mips/ingenic_jz47xx/timer-target.h b/firmware/target/mips/ingenic_jz47xx/timer-target.h
index 2e072440ab..d42bd41bdc 100644
--- a/firmware/target/mips/ingenic_jz47xx/timer-target.h
+++ b/firmware/target/mips/ingenic_jz47xx/timer-target.h
@@ -33,7 +33,7 @@ void __timer_stop(void);
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
-#define __TIMER_START() \
+#define __TIMER_START(int_prio) \
__timer_start()
#define __TIMER_STOP(...) \
diff --git a/firmware/target/sh/archos/timer-archos.c b/firmware/target/sh/archos/timer-archos.c
new file mode 100644
index 0000000000..e7526a8409
--- /dev/null
+++ b/firmware/target/sh/archos/timer-archos.c
@@ -0,0 +1,85 @@
+/***************************************************************************
+* __________ __ ___.
+* Open \______ \ ____ ____ | | _\_ |__ _______ ___
+* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+* \/ \/ \/ \/ \/
+* $Id$
+*
+* Copyright (C) 2005 Jens Arnold
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License
+* as published by the Free Software Foundation; either version 2
+* of the License, or (at your option) any later version.
+*
+* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+* KIND, either express or implied.
+*
+****************************************************************************/
+
+#include "cpu.h"
+#include "system.h"
+#include "timer.h"
+#include "timer-target.h"
+
+void IMIA4(void) __attribute__((interrupt_handler));
+void IMIA4(void)
+{
+ if (pfn_timer != NULL)
+ pfn_timer();
+ and_b(~0x01, &TSR4); /* clear the interrupt */
+}
+
+bool __timer_set(long cycles, bool start)
+{
+ int phi = 0; /* bits for the prescaler */
+ int prescale = 1;
+
+ while (cycles > 0x10000)
+ { /* work out the smallest prescaler that makes it fit */
+ phi++;
+ prescale <<= 1;
+ cycles >>= 1;
+ }
+
+ if (prescale > 8)
+ return false;
+
+ if (start)
+ {
+ if (pfn_unregister != NULL)
+ {
+ pfn_unregister();
+ pfn_unregister = NULL;
+ }
+
+ and_b(~0x10, &TSTR); /* Stop the timer 4 */
+ and_b(~0x10, &TSNC); /* No synchronization */
+ and_b(~0x10, &TMDR); /* Operate normally */
+
+ TIER4 = 0xF9; /* Enable GRA match interrupt */
+ }
+
+ TCR4 = 0x20 | phi; /* clear at GRA match, set prescaler */
+ GRA4 = (unsigned short)(cycles - 1);
+ if (start || (TCNT4 >= GRA4))
+ TCNT4 = 0;
+ and_b(~0x01, &TSR4); /* clear an eventual interrupt */
+
+ return true;
+}
+
+bool __timer_start(int int_prio)
+{
+ IPRD = (IPRD & 0xFF0F) | int_prio << 4; /* interrupt priority */
+ or_b(0x10, &TSTR); /* start timer 4 */
+ return true;
+}
+
+void __timer_stop(void)
+{
+ and_b(~0x10, &TSTR); /* stop the timer 4 */
+ IPRD = (IPRD & 0xFF0F); /* disable interrupt */
+}
diff --git a/firmware/target/sh/archos/timer-target.h b/firmware/target/sh/archos/timer-target.h
new file mode 100644
index 0000000000..08fcae1156
--- /dev/null
+++ b/firmware/target/sh/archos/timer-target.h
@@ -0,0 +1,41 @@
+/***************************************************************************
+* __________ __ ___.
+* Open \______ \ ____ ____ | | _\_ |__ _______ ___
+* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+* \/ \/ \/ \/ \/
+* $Id$
+*
+* Copyright (C) 2005 Jens Arnold
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License
+* as published by the Free Software Foundation; either version 2
+* of the License, or (at your option) any later version.
+*
+* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+* KIND, either express or implied.
+*
+****************************************************************************/
+#ifndef TIMER_TARGET_H
+#define TIMER_TARGET_H
+
+#include "config.h"
+
+bool __timer_set(long cycles, bool start);
+bool __timer_start(int int_prio);
+void __timer_stop(void);
+
+#define TIMER_FREQ CPU_FREQ
+
+#define __TIMER_SET(cycles, set) \
+ __timer_set(cycles, set)
+
+#define __TIMER_START(int_prio) \
+ __timer_start(int_prio)
+
+#define __TIMER_STOP(...) \
+ __timer_stop()
+
+#endif /* TIMER_TARGET_H */
diff --git a/firmware/timer.c b/firmware/timer.c
index 34b410c017..044b871b3f 100644
--- a/firmware/timer.c
+++ b/firmware/timer.c
@@ -42,15 +42,7 @@ static long SHAREDBSS_ATTR cycles_new = 0;
#endif
/* interrupt handler */
-#if CONFIG_CPU == SH7034
-void IMIA4(void) __attribute__((interrupt_handler));
-void IMIA4(void)
-{
- if (pfn_timer != NULL)
- pfn_timer();
- and_b(~0x01, &TSR4); /* clear the interrupt */
-}
-#elif defined(CPU_PP)
+#if defined(CPU_PP)
void TIMER2(void)
{
TIMER2_VAL; /* ACK interrupt */
@@ -72,43 +64,7 @@ void TIMER2(void)
static bool timer_set(long cycles, bool start)
{
-#if CONFIG_CPU == SH7034
- int phi = 0; /* bits for the prescaler */
- int prescale = 1;
-
- while (cycles > 0x10000)
- { /* work out the smallest prescaler that makes it fit */
- phi++;
- prescale <<= 1;
- cycles >>= 1;
- }
-
- if (prescale > 8)
- return false;
-
- if (start)
- {
- if (pfn_unregister != NULL)
- {
- pfn_unregister();
- pfn_unregister = NULL;
- }
-
- and_b(~0x10, &TSTR); /* Stop the timer 4 */
- and_b(~0x10, &TSNC); /* No synchronization */
- and_b(~0x10, &TMDR); /* Operate normally */
-
- TIER4 = 0xF9; /* Enable GRA match interrupt */
- }
-
- TCR4 = 0x20 | phi; /* clear at GRA match, set prescaler */
- GRA4 = (unsigned short)(cycles - 1);
- if (start || (TCNT4 >= GRA4))
- TCNT4 = 0;
- and_b(~0x01, &TSR4); /* clear an eventual interrupt */
-
- return true;
-#elif defined(CPU_PP)
+#if defined(CPU_PP)
if (cycles > 0x20000000 || cycles < 2)
return false;
@@ -153,11 +109,7 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
pfn_unregister = unregister_callback;
timer_prio = reg_prio;
-#if CONFIG_CPU == SH7034
- IPRD = (IPRD & 0xFF0F) | int_prio << 4; /* interrupt priority */
- or_b(0x10, &TSTR); /* start timer 4 */
- return true;
-#elif defined(CPU_PP)
+#if defined(CPU_PP)
/* unmask interrupt source */
#if NUM_CORES > 1
if (core == COP)
@@ -167,7 +119,7 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
CPU_INT_EN = TIMER2_MASK;
return true;
#else
- return __TIMER_START();
+ return __TIMER_START(int_prio);
#endif
/* Cover for targets that don't use all these */
(void)reg_prio;
@@ -185,10 +137,7 @@ bool timer_set_period(long cycles)
void timer_unregister(void)
{
-#if CONFIG_CPU == SH7034
- and_b(~0x10, &TSTR); /* stop the timer 4 */
- IPRD = (IPRD & 0xFF0F); /* disable interrupt */
-#elif defined(CPU_PP)
+#if defined(CPU_PP)
TIMER2_CFG = 0; /* stop timer 2 */
CPU_INT_DIS = TIMER2_MASK;
COP_INT_DIS = TIMER2_MASK;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 20:33:51 +0000