diff options
Diffstat (limited to 'firmware/target')
6 files changed, 134 insertions, 116 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/crt0.S b/firmware/target/mips/ingenic_jz47xx/crt0.S index 97e01d8566..5cfd49141a 100644 --- a/firmware/target/mips/ingenic_jz47xx/crt0.S +++ b/firmware/target/mips/ingenic_jz47xx/crt0.S @@ -66,17 +66,16 @@ _start: li t0, (M_StatusBEV | M_StatusIM7 | M_StatusIM6 \ | M_StatusIM5 | M_StatusIM4 | M_StatusIM3 \ - | M_StatusIM2 | M_StatusERL | M_StatusSM) + | M_StatusIM2 | M_StatusERL) /* BEV = Enable Boot Exception Vectors IMx = Interrupt mask ERL = Denotes error level - SM = Supervisor Mode */ mtc0 t0, C0_STATUS - li t1, M_CauseIV - mtc0 t1, C0_CAUSE + li t0, M_CauseIV + mtc0 t0, C0_CAUSE /* ---------------------------------------------------- @@ -85,7 +84,7 @@ _start: */ li t0, 3 // enable cache for kseg0 accesses mtc0 t0, C0_CONFIG // CONFIG reg - la t0, 0x80000000 // an idx op should use a unmappable address + la t0, 0x80000000 // an idx op should use an unmappable address ori t1, t0, 0x4000 // 16kB cache mtc0 zero, C0_TAGLO // TAGLO reg mtc0 zero, C0_TAGHI // TAGHI reg @@ -215,25 +214,26 @@ real_exception_handler: sw v1, 0x64(sp) sw v0, 0x68(sp) sw $1, 0x6C(sp) - mflo t0 # Move From LO + mflo k0 # Move From LO nop - sw t0, 0x70(sp) - mfhi t0 # Move From HI + sw k0, 0x70(sp) + mfhi k0 # Move From HI nop - sw t0, 0x74(sp) - mfc0 t0, C0_STATUS # Status register + sw k0, 0x74(sp) + mfc0 k0, C0_STATUS # Status register sll zero, 1 sll zero, 1 sll zero, 1 sll zero, 1 - sw t0, 0x78(sp) - mfc0 t0, C0_EPC # Exception Program Counter + sw k0, 0x78(sp) + mfc0 k0, C0_EPC # Exception Program Counter sll zero, 1 sll zero, 1 sll zero, 1 sll zero, 1 - sw t0, 0x7C(sp) - li k1, 0x7C + sw k0, 0x7C(sp) + + li k1, M_CauseExcCode mfc0 k0, C0_CAUSE # C0_CAUSE of last exception and k0, k1 beq zero, k0, _int @@ -273,7 +273,7 @@ _int: lw a0, 0x60(sp) lw v1, 0x64(sp) lw v0, 0x68(sp) - lw v1, 0x6C(sp) + lw $1, 0x6C(sp) lw k0, 0x70(sp) mtlo k0 # Move To LO nop @@ -313,7 +313,57 @@ _exception: sll zero, 1 sll zero, 1 sll zero, 1 - la k0, exception_handler - jr k0 + jal exception_handler + nop + lw ra, 0(sp) + lw fp, 4(sp) + sw gp, 8(sp) + lw t9, 0xC(sp) + lw t8, 0x10(sp) + lw s7, 0x14(sp) + lw s6, 0x18(sp) + lw s5, 0x1C(sp) + lw s4, 0x20(sp) + lw s3, 0x24(sp) + lw s2, 0x28(sp) + lw s1, 0x2C(sp) + lw s0, 0x30(sp) + lw t7, 0x34(sp) + lw t6, 0x38(sp) + lw t5, 0x3C(sp) + lw t4, 0x40(sp) + lw t3, 0x44(sp) + lw t2, 0x48(sp) + lw t1, 0x4C(sp) + lw t0, 0x50(sp) + lw a3, 0x54(sp) + lw a2, 0x58(sp) + lw a1, 0x5C(sp) + lw a0, 0x60(sp) + lw v1, 0x64(sp) + lw v0, 0x68(sp) + lw $1, 0x6C(sp) + lw k0, 0x70(sp) + mtlo k0 # Move To LO + nop + lw k0, 0x74(sp) + mthi k0 # Move To HI + nop + lw k0, 0x78(sp) + nop + mtc0 k0, C0_STATUS # Status register + sll zero, 1 + sll zero, 1 + sll zero, 1 + sll zero, 1 + lw k0, 0x7C(sp) + nop + mtc0 k0, C0_EPC # Exception Program Counter + sll zero, 1 + sll zero, 1 + sll zero, 1 + sll zero, 1 + addiu sp, 0x80 + eret # Exception Return nop .set reorder diff --git a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c index 6bb7db8d9b..90ecfc6a3a 100644 --- a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c @@ -68,7 +68,7 @@ void lcd_update_rect(int x, int y, int width, int height) | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BIT); /* | (2 << 12) | (3 << 8) */ REG_DMAC_DCCSR(0) = (DMAC_DCCSR_NDES | DMAC_DCCSR_EN); /* (1 << 31) | (1 << 0) */ - dma_cache_wback_inv((unsigned long)&lcd_framebuffer[y][x], width*height); + __dcache_writeback_all(); /* Size of framebuffer is way bigger than cache size */ REG_DMAC_DMACR = DMAC_DMACR_DMAE; diff --git a/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c b/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c index 98fa8e7a20..3846987026 100644 --- a/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c +++ b/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c @@ -24,14 +24,14 @@ #include "r61509.h" #include "lcd-target.h" -#define PIN_CS_N (32*1+17) /* Chip select */ +#define PIN_CS_N (32*1+17) /* Chip select */ #define PIN_RESET_N (32*1+18) /* Reset */ -#define my__gpio_as_lcd_16bit() \ -do { \ - REG_GPIO_PXFUNS(2) = 0x001cffff; \ - REG_GPIO_PXSELC(2) = 0x001cffff; \ - REG_GPIO_PXPES(2) = 0x001cffff; \ +#define my__gpio_as_lcd_16bit() \ +do { \ + REG_GPIO_PXFUNS(2) = 0x001cffff; \ + REG_GPIO_PXSELC(2) = 0x001cffff; \ + REG_GPIO_PXPES(2) = 0x001cffff; \ } while (0) @@ -45,12 +45,12 @@ static void _display_pin_init(void) __gpio_as_output(PIN_RESET_N); __gpio_clear_pin(PIN_CS_N); - __gpio_set_pin(PIN_RESET_N); - DELAY; - __gpio_clear_pin(PIN_RESET_N); - DELAY; - __gpio_set_pin(PIN_RESET_N); - DELAY; + __gpio_set_pin(PIN_RESET_N); + DELAY; + __gpio_clear_pin(PIN_RESET_N); + DELAY; + __gpio_set_pin(PIN_RESET_N); + DELAY; } #define WAIT_ON_SLCD while(REG_SLCD_STATE & SLCD_STATE_BUSY); @@ -189,7 +189,7 @@ static void _display_off(void) static void _set_lcd_bus(void) { REG_LCD_CFG &= ~LCD_CFG_LCDPIN_MASK; - REG_LCD_CFG |= LCD_CFG_LCDPIN_SLCD; + REG_LCD_CFG |= LCD_CFG_LCDPIN_SLCD; REG_SLCD_CFG = (SLCD_CFG_BURST_8_WORD | SLCD_CFG_DWIDTH_16 | SLCD_CFG_CWIDTH_16BIT | SLCD_CFG_CS_ACTIVE_LOW | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING @@ -200,17 +200,17 @@ static void _set_lcd_bus(void) static void _set_lcd_clock(void) { - unsigned int val; - int pll_div; + unsigned int val; + int pll_div; __cpm_stop_lcd(); - pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source, 0:pllout/2 1: pllout */ - pll_div = pll_div ? 1 : 2 ; - val = ( __cpm_get_pllout()/pll_div ) / 336000000; - val--; - if ( val > 0x1ff ) - val = 0x1ff; /* CPM_LPCDR is too large, set it to 0x1ff */ - __cpm_set_pixdiv(val); + pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source, 0:pllout/2 1: pllout */ + pll_div = pll_div ? 1 : 2 ; + val = ( __cpm_get_pllout()/pll_div ) / 336000000; + val--; + if ( val > 0x1ff ) + val = 0x1ff; /* CPM_LPCDR is too large, set it to 0x1ff */ + __cpm_set_pixdiv(val); __cpm_start_lcd(); } diff --git a/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c b/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c index 0f11782d3f..dd169c3a44 100644 --- a/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c +++ b/firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c @@ -122,13 +122,16 @@ int button_read_device(int *data) ret |= BUTTON_POWER; } - if(pendown_flag) + if(data != NULL) { - *data = touch_to_pixels(stable_x_pos, stable_y_pos); - ret |= BUTTON_TOUCH; + if(pendown_flag) + { + *data = touch_to_pixels(stable_x_pos, stable_y_pos); + ret |= BUTTON_TOUCH; + } + else + *data = 0; } - else - *data = 0; return ret; } @@ -199,7 +202,7 @@ void SADC(void) xData = (dat >> 0) & 0xfff; yData = (dat >> 16) & 0xfff; - + dat = REG_SADC_TSDAT; tsz1Data = (dat >> 0) & 0xfff; tsz2Data = (dat >> 16) & 0xfff; diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c index 61be6c60de..1a41723ffc 100644 --- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c @@ -324,7 +324,7 @@ static int get_irq_number(void) void intr_handler(void) { - irq = get_irq_number(); + int irq = get_irq_number(); if(irq < 0) return; @@ -361,7 +361,7 @@ static char* parse_exception(unsigned int cause) } void exception_handler(void* stack_ptr, unsigned int cause, unsigned int epc) -{ +{ panicf("Exception occurred: %s [0x%08x] at 0x%08x (stack at 0x%08x)", parse_exception(cause), cause, epc, (unsigned int)stack_ptr); } @@ -457,23 +457,6 @@ void __icache_invalidate_all(void) { unsigned int i; -/* - do - { - unsigned long __k0_addr; - - __asm__ __volatile__( - "la %0, 1f \n" - "or %0, %0, %1 \n" - "jr %0 \n" - "nop \n" - "1: nop \n" - : "=&r"(__k0_addr) - : "r" (0x20000000) - ); - } while(0); -*/ - asm volatile (".set noreorder \n" ".set mips32 \n" "mtc0 $0, $28 \n" /* TagLo */ @@ -484,34 +467,16 @@ void __icache_invalidate_all(void) for(i=KSEG0; i<KSEG0+CACHE_SIZE; i+=CACHE_LINE_SIZE) __CACHE_OP(Index_Store_Tag_I, i); -/* - do - { - unsigned long __k0_addr; - __asm__ __volatile__( - "nop;nop;nop;nop;nop;nop;nop \n" - "la %0, 1f \n" - "jr %0 \n" - "nop \n" - "1: nop \n" - : "=&r" (__k0_addr) - ); - } while(0); -*/ - - do - { - unsigned long tmp; - __asm__ __volatile__( - ".set mips32 \n" - "mfc0 %0, $16, 7 \n" /* Config */ - "nop \n" - "ori %0, 2 \n" - "mtc0 %0, $16, 7 \n" /* Config */ - "nop \n" - ".set mips0 \n" - : "=&r" (tmp)); - } while(0); + /* invalidate btb */ + asm volatile ( + ".set mips32 \n" + "mfc0 %0, $16, 7 \n" + "nop \n" + "ori %0, 2 \n" + "mtc0 %0, $16, 7 \n" + ".set mips0 \n" + : + : "r" (i)); } void __dcache_invalidate_all(void) @@ -657,13 +622,14 @@ static void tlb_init(void) void tlb_refill_handler(void) { - panicf("TLB refill handler! [0x%x] [0x%lx]", read_c0_badvaddr(), read_c0_epc()); + panicf("TLB refill handler at 0x%08lx! [0x%x]", read_c0_epc(), read_c0_badvaddr()); } static void tlb_call_refill(void) { asm("la $8, tlb_refill_handler \n" - "jr $8 \n"); + "jr $8 \n" + ); } extern int main(void); @@ -687,18 +653,18 @@ void system_main(void) __dcache_writeback_all(); __icache_invalidate_all(); - write_c0_status(1 << 28 | 1 << 10 | 1 << 3); /* Enable CP | Mask interrupt 2 | Supervisor mode */ + write_c0_status(1 << 28 | 1 << 10 ); /* Enable CP | Mask interrupt 2 */ /* Disable all interrupts */ for(i=0; i<IRQ_MAX; i++) dis_irq(i); - //tlb_init(); - - sti(); + tlb_init(); detect_clock(); + sti(); + main(); while(1); diff --git a/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c b/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c index 92a2f3b801..cf107397e3 100644 --- a/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c @@ -824,25 +824,21 @@ void usbHandleStandDevReq(u8 *buf) extern char printfbuf[256]; -int GET_CUP_INFO_Handle() -{ - HW_SendPKT(0, printfbuf, 64); - udc_state = IDLE; - return 0; -} - void usbHandleVendorReq(u8 *buf) { - int ret_state; + int ret_state, i; USB_DeviceRequest *dreq = (USB_DeviceRequest *)buf; - switch (dreq->bRequest) { - case 0xAB: - ret_state=GET_CUP_INFO_Handle(); - break; - case 0x12: - HW_SendPKT(0, "TEST", 4); - udc_state = IDLE; - break; + switch (dreq->bRequest) + { + case 0xAB: + //for(i=0; i<256; i+=64) + HW_SendPKT(0, printfbuf, 64); + udc_state = IDLE; + break; + case 0x12: + HW_SendPKT(0, "TEST", 4); + udc_state = IDLE; + break; } } @@ -1032,6 +1028,9 @@ void __udc_start(void) system_enable_irq(IRQ_UDC); } -void usb_init_device(void){} +void usb_init_device(void) +{ + __udc_start(); +} #endif |