diff options
Diffstat (limited to 'firmware/target/arm/s5l8702/clocking-s5l8702.c')
| -rw-r--r-- | firmware/target/arm/s5l8702/clocking-s5l8702.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/firmware/target/arm/s5l8702/clocking-s5l8702.c b/firmware/target/arm/s5l8702/clocking-s5l8702.c index 3ef70ba1de..b7fa45fcf5 100644 --- a/firmware/target/arm/s5l8702/clocking-s5l8702.c +++ b/firmware/target/arm/s5l8702/clocking-s5l8702.c @@ -213,6 +213,14 @@ void set_clocking_level(int level) udelay(50); /* TBC: probably not needed */ } +void clockgate_enable(int gate, bool enable) +{ + int i = (gate >> 5) & 1; + uint32_t bit = 1 << (gate & 0x1f); + if (enable) PWRCON(i) &= ~bit; + else PWRCON(i) |= bit; +} + #ifdef BOOTLOADER int pll_config(int pll, int op_mode, int p, int m, int s, int lock_time) { @@ -299,14 +307,6 @@ void cg16_config(volatile uint16_t* cg16, while (*cg16 != val16); } -void clockgate_enable(int gate, bool enable) -{ - int i = (gate >> 5) & 1; - uint32_t bit = 1 << (gate & 0x1f); - if (enable) PWRCON(i) &= ~bit; - else PWRCON(i) |= bit; -} - /* Configures EClk for USEC_TIMER. DRAM refresh also depends on EClk, * this clock should be initialized by the bootloader, so USEC_TIMER * is ready to use for RB. |