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-rw-r--r--firmware/export/config-creativezvm.h60
-rw-r--r--firmware/export/config.h7
-rw-r--r--firmware/export/dm320.h5
-rw-r--r--firmware/export/isp1583.h185
4 files changed, 233 insertions, 24 deletions
diff --git a/firmware/export/config-creativezvm.h b/firmware/export/config-creativezvm.h
index 0b91510146..f5ec33317e 100644
--- a/firmware/export/config-creativezvm.h
+++ b/firmware/export/config-creativezvm.h
@@ -27,7 +27,7 @@
#define CREATIVE_ZVM 1
/* For Rolo and boot loader */
-#define MODEL_NUMBER 35
+#define MODEL_NUMBER 26
/* define this if you use an ATA controller */
#define HAVE_ATA
@@ -65,15 +65,12 @@
/* Define this if your LCD can be enabled/disabled */
#define HAVE_LCD_ENABLE
-#define LCD_REMOTE_PIXELFORMAT VERTICAL_PACKING
-
-#define MIN_REMOTE_CONTRAST_SETTING 0
-#define MAX_REMOTE_CONTRAST_SETTING 15
-#define DEFAULT_REMOTE_CONTRAST_SETTING 7
-
-#define CONFIG_KEYPAD MROBE500_PAD
+#define CONFIG_KEYPAD CREATIVEZVM_PAD
+#define HAS_BUTTON_HOLD
+#define HAVE_HEADPHONE_DETECTION
//#define HAVE_TOUCHPAD
-#define HAVE_BUTTON_DATA
+
+#define CONFIG_I2C I2C_DM320
/* Define this if you do software codec */
#define CONFIG_CODEC SWCODEC
@@ -84,16 +81,17 @@
/* Define this for LCD backlight available */
//#define HAVE_BACKLIGHT
-#define HAVE_BACKLIGHT_BRIGHTNESS
+//#define HAVE_BACKLIGHT_BRIGHTNESS
/* Main LCD backlight brightness range and defaults */
-#define MIN_BRIGHTNESS_SETTING 0
-#define MAX_BRIGHTNESS_SETTING 127
-#define DEFAULT_BRIGHTNESS_SETTING 85 /* OF "full brightness" */
-#define DEFAULT_DIMNESS_SETTING 22 /* OF "most dim" */
+//#define MIN_BRIGHTNESS_SETTING 0
+//#define MAX_BRIGHTNESS_SETTING 127
+//#define DEFAULT_BRIGHTNESS_SETTING 85 /* OF "full brightness" */
+//#define DEFAULT_DIMNESS_SETTING 22 /* OF "most dim" */
/* Define this if you have a software controlled poweroff */
-#define HAVE_SW_POWEROFF
+//#define HAVE_SW_POWEROFF
+//TODO: enable this back
/* The number of bytes reserved for loadable codecs */
#define CODEC_SIZE 0x80000
@@ -104,11 +102,11 @@
/* Define this if you have the TLV320 audio codec */
//#define HAVE_TLV320
-/* Define this if you want to use the adaptive bass capibility of the 8751 */
-/* #define USE_ADAPTIVE_BASS */
+/* TLV320 has no tone controls, so we use the software ones */
+//#define HAVE_SW_TONE_CONTROLS
-#define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | \
- SAMPR_CAP_11)
+/*#define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | \
+ SAMPR_CAP_11)*/
#define BATTERY_CAPACITY_DEFAULT 1100 /* default battery capacity */
#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */
@@ -117,7 +115,7 @@
#define BATTERY_TYPES_COUNT 1 /* only one type */
/* Hardware controlled charging with monitoring */
-#define CONFIG_CHARGING CHARGING_MONITOR
+//#define CONFIG_CHARGING CHARGING_MONITOR
#ifndef SIMULATOR
@@ -127,8 +125,7 @@
/* Define this if you have a Texas Instruments TSC2100 touch screen */
//#define HAVE_TSC2100
-/* Define this if you want to use coldfire's i2c interface */
-//#define CONFIG_I2C I2C_S3C2440
+#define CONFIG_USBOTG USBOTG_ISP1583
/* define this if the hardware can be powered off while charging */
#define HAVE_POWEROFF_WHILE_CHARGING
@@ -161,4 +158,23 @@
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
+#define HAVE_USBSTACK
+#define USB_VENDOR_ID 0x041e
+#define USB_PRODUCT_ID 0x4133
+
+#define USB_SERIAL
+
+//DEBUGGING!
+#ifdef BOOTLOADER
+#define THREAD_EXTRA_CHECKS 1
+#define DEBUG 1
+#define debug(msg) printf(msg)
+#define BUTTON_DEBUG
+
+#define DO_THREAD_TEST
+#endif
+
+
+//Uncomment next line to make this build Zen Vision compatible
+//#define ZEN_VISION
#endif
diff --git a/firmware/export/config.h b/firmware/export/config.h
index e502043844..f4e38ce73c 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -79,6 +79,7 @@
#define IAUDIO67_PAD 21
#define COWOND2_PAD 22
#define IAUDIO_M3_PAD 23
+#define CREATIVEZVM_PAD 24
/* CONFIG_REMOTE_KEYPAD */
#define H100_REMOTE 1
@@ -143,6 +144,7 @@
#define I2C_IMX31L 9
#define I2C_TCC77X 10
#define I2C_TCC780X 11
+#define I2C_DM320 12 /* DM320 style */
/* CONFIG_LED */
#define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */
@@ -169,6 +171,7 @@
/* USB On-the-go */
#define USBOTG_ISP1362 1362 /* iriver H300 */
+#define USBOTG_ISP1583 1583 /* Creative Zen Vision:M */
#define USBOTG_M5636 5636 /* iAudio X5 */
#define USBOTG_ARC 5020 /* PortalPlayer 502x */
@@ -389,13 +392,13 @@
#define ARM_ARCH 6 /* ARMv6 */
#endif
-#if defined(CPU_TCC77X) || defined(CPU_TCC780X)
+#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320)
#define CPU_ARM
#define ARM_ARCH 5 /* ARMv5 */
#endif
#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \
- || (CONFIG_CPU == DSC25) || (CONFIG_CPU == DM320)
+ || (CONFIG_CPU == DSC25)
#define CPU_ARM
#define ARM_ARCH 4 /* ARMv4 */
#endif
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index 4a26f6e3d5..a70083331e 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -28,7 +28,12 @@
#define LCD_BUFFER_SIZE (LCD_WIDTH*LCD_HEIGHT*2)
#define TTB_SIZE (0x4000)
/* must be 16Kb (0x4000) aligned */
+#if 0
+#define MEM_END 0x00900000 + (MEM*0x00100000)
+#define TTB_BASE ((unsigned int *)(MEM_END - TTB_SIZE)) /* End of memory */
+#else
#define TTB_BASE ((unsigned int *)(0x04900000 - TTB_SIZE)) /* End of memory */
+#endif
#define FRAME ((short *) ((char*)TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */
#define PHY_IO_BASE 0x00030000
diff --git a/firmware/export/isp1583.h b/firmware/export/isp1583.h
new file mode 100644
index 0000000000..3ffbbed60e
--- /dev/null
+++ b/firmware/export/isp1583.h
@@ -0,0 +1,185 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Maurus Cuelenaere
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef ISP1583_H
+#define ISP1583_H
+
+#ifndef ISP1583_H_OVERRIDE
+/* Initialization registers */
+#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0)))
+#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC)))
+#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10)))
+#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12)))
+#define ISP1583_INIT_INTEN_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x14)))
+#define ISP1583_INIT_INTEN_B
+#define ISP1583_INIT_INTEN_READ ISP1583_INIT_INTEN_A
+/* Data Flow registers */
+#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2)))
+#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28)))
+#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20)))
+#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C)))
+#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E)))
+#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04)))
+#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08)))
+/* DMA registers */
+#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58)))
+/* General registers */
+#define ISP1583_GEN_INT_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x18)))
+#define ISP1583_GEN_INT_B
+#define ISP1583_GEN_INT_READ ISP1583_GEN_INT_A
+#define ISP1583_GEN_CHIPID (*((volatile unsigned long*)(ISP1583_IOBASE+0x70))) /* Size=3 bytes */
+#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74)))
+#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78)))
+#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C)))
+#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84)))
+
+#define set_int_value(a,b,value) a = value;
+#endif
+
+#define ISP1583_UNLOCK_CODE (unsigned short)0xAA37
+
+/* Initialization registers' bits */
+
+/* Initialization OTG register bits */
+#define INIT_OTG_BSESS_VALID (1 << 4)
+
+/* Initialization Mode register bits */
+#define INIT_MODE_TEST2 (1 << 15)
+#define INIT_MODE_TEST1 (1 << 14)
+#define INIT_MODE_TEST0 (1 << 13)
+#define INIT_MODE_DMA_CLKON (1 << 9)
+#define INIT_MODE_VBUSSTAT (1 << 8)
+#define INIT_MODE_CLKAON (1 << 7)
+#define INIT_MODE_SNDRSU (1 << 6)
+#define INIT_MODE_GOSUSP (1 << 5)
+#define INIT_MODE_SFRESET (1 << 4)
+#define INIT_MODE_GLINTENA (1 << 3)
+#define INIT_MODE_WKUPCS (1 << 2)
+#define INIT_MODE_PWRON (1 << 1)
+#define INIT_MODE_SOFTCT (1 << 0)
+
+/* Initialization Interrupt Enable register bits */
+#define INIT_INTEN_IEP7TX (1 << 25)
+#define INIT_INTEN_IEP7RX (1 << 24)
+#define INIT_INTEN_IEP6TX (1 << 23)
+#define INIT_INTEN_IEP6RX (1 << 22)
+#define INIT_INTEN_IEP5TX (1 << 21)
+#define INIT_INTEN_IEP5RX (1 << 20)
+#define INIT_INTEN_IEP4TX (1 << 19)
+#define INIT_INTEN_IEP4RX (1 << 18)
+#define INIT_INTEN_IEP3TX (1 << 17)
+#define INIT_INTEN_IEP3RX (1 << 16)
+#define INIT_INTEN_IEP2TX (1 << 15)
+#define INIT_INTEN_IEP2RX (1 << 14)
+#define INIT_INTEN_IEP1TX (1 << 13)
+#define INIT_INTEN_IEP1RX (1 << 12)
+#define INIT_INTEN_IEP0TX (1 << 11)
+#define INIT_INTEN_IEP0RX (1 << 10)
+#define INIT_INTEN_IEP0SETUP (1 << 8)
+#define INIT_INTEN_IEVBUS (1 << 7)
+#define INIT_INTEN_IEDMA (1 << 6)
+#define INIT_INTEN_IEHS_STA (1 << 5)
+#define INIT_INTEN_IERESM (1 << 4)
+#define INIT_INTEN_IESUSP (1 << 3)
+#define INIT_INTEN_IEPSOF (1 << 2)
+#define INIT_INTEN_IESOF (1 << 1)
+#define INIT_INTEN_IEBRST (1 << 0)
+
+/* Initialization Interrupt Configuration register bits */
+#define INIT_INTCONF_INTLVL (1 << 1)
+#define INIT_INTCONF_INTPOL (1 << 0)
+
+/* Initialization Address register bits */
+#define INIT_ADDRESS_DEVEN (1 << 7)
+
+/* Data Flow registers' bits */
+
+/* Data Flow Endpoint Index register bits */
+#define DFLOW_EPINDEX_EP0SETUP (1 << 5)
+
+/* Data Flow Control Function register bits */
+#define DFLOW_CTRLFUN_CLBUF (1 << 4)
+#define DFLOW_CTRLFUN_VENDP (1 << 3)
+#define DFLOW_CTRLFUN_DSEN (1 << 2)
+#define DFLOW_CTRLFUN_STATUS (1 << 1)
+#define DFLOW_CTRLFUN_STALL (1 << 0)
+
+/* Data Flow Endpoint Type register bits */
+#define DFLOW_EPTYPE_NOEMPKT (1 << 4)
+#define DFLOW_EPTYPE_ENABLE (1 << 3)
+#define DFLOW_EPTYPE_DBLBUF (1 << 2)
+
+/* General registers' bits */
+
+/* General Test Mode register bits */
+#define GEN_TSTMOD_FORCEHS (1 << 7)
+#define GEN_TSTMOD_FORCEFS (1 << 4)
+#define GEN_TSTMOD_PRBS (1 << 3)
+#define GEN_TSTMOD_KSTATE (1 << 2)
+#define GEN_TSTMOD_JSTATE (1 << 1)
+#define GEN_TSTMOD_SE0_NAK (1 << 0)
+
+/* Interrupts */
+#define INT_IEP7TX (1 << 25)
+#define INT_IEP7RX (1 << 24)
+#define INT_IEP6TX (1 << 23)
+#define INT_IEP6RX (1 << 22)
+#define INT_IEP5TX (1 << 21)
+#define INT_IEP5RX (1 << 20)
+#define INT_IEP4TX (1 << 19)
+#define INT_IEP4RX (1 << 18)
+#define INT_IEP3TX (1 << 17)
+#define INT_IEP3RX (1 << 16)
+#define INT_IEP2TX (1 << 15)
+#define INT_IEP2RX (1 << 14)
+#define INT_IEP1TX (1 << 13)
+#define INT_IEP1RX (1 << 12)
+#define INT_IEP0TX (1 << 11)
+#define INT_IEP0RX (1 << 10)
+#define INT_IEP0SETUP (1 << 8)
+#define INT_IEVBUS (1 << 7)
+#define INT_IEDMA (1 << 6)
+#define INT_IEHS_STA (1 << 5)
+#define INT_IERESM (1 << 4)
+#define INT_IESUSP (1 << 3)
+#define INT_IEPSOF (1 << 2)
+#define INT_IESOF (1 << 1)
+#define INT_IEBRST (1 << 0)
+
+#define INT_EP_MASK ( INT_IEP0RX | INT_IEP0TX | INT_IEP1RX | INT_IEP1TX | INT_IEP2RX | INT_IEP2TX | INT_IEP3RX | INT_IEP3TX | INT_IEP4RX | INT_IEP4TX | INT_IEP5RX | INT_IEP5TX | INT_IEP6RX | INT_IEP6TX | INT_IEP7RX | INT_IEP7TX )
+
+#define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX )
+#define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA )
+
+bool usb_drv_powered(void);
+void usb_drv_init(void);
+int usb_drv_port_speed(void);
+void usb_drv_exit(void);
+void usb_drv_stall(int endpoint, bool stall, bool in);
+bool usb_drv_stalled(int endpoint, bool in);
+int usb_drv_recv(int ep, void* ptr, int length);
+int usb_drv_send_nonblocking(int ep, void* ptr, int length);
+int usb_drv_send(int endpoint, void* ptr, int length);
+void usb_drv_reset_endpoint(int ep, bool send);
+void usb_drv_wait(int ep, bool send);
+void usb_drv_cancel_all_transfers(void);
+void usb_drv_set_address(int address);
+void usb_drv_set_test_mode(int mode);
+void usb_drv_int(void); /* Method for handling interrupts, must be called from usb-<target>.c */
+
+#endif
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