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Diffstat (limited to 'firmware/export/i2c-coldfire.h')
-rw-r--r--firmware/export/i2c-coldfire.h38
1 files changed, 19 insertions, 19 deletions
diff --git a/firmware/export/i2c-coldfire.h b/firmware/export/i2c-coldfire.h
index e5b34ddea6..b0d21a8631 100644
--- a/firmware/export/i2c-coldfire.h
+++ b/firmware/export/i2c-coldfire.h
@@ -44,31 +44,31 @@ void i2c_adjust_prescale(int multiplier);
#define MAX_LOOP 0x100 /* TODO: select a better value */
/* PLLCR control */
-#define QSPISEL (1 << 11) /* Selects QSPI or I2C interface */
+#define QSPISEL (1 << 11) /* Selects QSPI or I2C interface */
/* Offsets to I2C registers from base address */
-#define O_MADR 0x00 /* Slave Address */
-#define O_MFDR 0x04 /* Frequency divider */
-#define O_MBCR 0x08 /* Control register */
-#define O_MBSR 0x0c /* Status register */
-#define O_MBDR 0x10 /* Data register */
+#define O_MADR 0x00 /* Slave Address */
+#define O_MFDR 0x04 /* Frequency divider */
+#define O_MBCR 0x08 /* Control register */
+#define O_MBSR 0x0c /* Status register */
+#define O_MBDR 0x10 /* Data register */
/* MBSR - Status register */
-#define ICF (1 << 7) /* Transfer Complete */
-#define IAAS (1 << 6) /* Addressed As Alave */
-#define IBB (1 << 5) /* Bus Busy */
-#define IAL (1 << 4) /* Arbitration Lost */
-#define SRW (1 << 2) /* Slave R/W */
-#define IIF (1 << 1) /* I2C Interrupt */
-#define RXAK (1 << 0) /* No Ack bit */
+#define ICF (1 << 7) /* Transfer Complete */
+#define IAAS (1 << 6) /* Addressed As Alave */
+#define IBB (1 << 5) /* Bus Busy */
+#define IAL (1 << 4) /* Arbitration Lost */
+#define SRW (1 << 2) /* Slave R/W */
+#define IIF (1 << 1) /* I2C Interrupt */
+#define RXAK (1 << 0) /* No Ack bit */
/* MBCR - Control register */
-#define IEN (1 << 7) /* I2C Enable */
-#define IIEN (1 << 6) /* Interrupt Enable */
-#define MSTA (1 << 5) /* Master/Slave select */
-#define MTX (1 << 4) /* Transmit/Receive */
-#define TXAK (1 << 3) /* Transfer ACK */
-#define RSTA (1 << 2) /* Restart.. */
+#define IEN (1 << 7) /* I2C Enable */
+#define IIEN (1 << 6) /* Interrupt Enable */
+#define MSTA (1 << 5) /* Master/Slave select */
+#define MTX (1 << 4) /* Transmit/Receive */
+#define TXAK (1 << 3) /* Transfer ACK */
+#define RSTA (1 << 2) /* Restart.. */
#endif