diff options
| -rw-r--r-- | firmware/target/arm/as3525/ata_sd_as3525.c | 18 | ||||
| -rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 7 | ||||
| -rw-r--r-- | firmware/target/arm/as3525/debug-as3525.c | 10 |
3 files changed, 22 insertions, 13 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c index 65df027c30..7567ac498d 100644 --- a/firmware/target/arm/as3525/ata_sd_as3525.c +++ b/firmware/target/arm/as3525/ata_sd_as3525.c @@ -103,9 +103,17 @@ static void init_pl180_controller(const int drive); static tCardInfo card_info[NUM_DRIVES]; -/* maximum timeouts recommanded in the SD Specification v2.00 */ -#define SD_MAX_READ_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */ -#define SD_MAX_WRITE_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */ +#ifdef HAVE_MULTIDRIVE +/* maximum timeouts recommended in the SD Specification v2.00 */ +#define SD_MAX_READ_TIMEOUT (((drive == SD_SLOT_AS3525)? (AS3525_PCLK_FREQ): \ + (AS3525_IDE_FREQ)) / 1000 * 100) /* 100 ms */ +#define SD_MAX_WRITE_TIMEOUT (((drive == SD_SLOT_AS3525)? (AS3525_PCLK_FREQ): \ + (AS3525_IDE_FREQ)) / 1000 * 250) /* 250 ms */ +#else +/* maximum timeouts recommended in the SD Specification v2.00 */ +#define SD_MAX_READ_TIMEOUT ((AS3525_IDE_FREQ) / 1000 * 100) /* 100 ms */ +#define SD_MAX_WRITE_TIMEOUT ((AS3525_IDE_FREQ) / 1000 * 250) /* 250 ms */ +#endif /* for compatibility */ static long last_disk_activity = -1; @@ -306,7 +314,7 @@ static int sd_init_card(const int drive) /* End of Card Identification Mode ************************************/ - /* full speed for controller clock MCICLK = MCLK = PCLK = 62 MHz */ + /* full speed for controller clock MCICLK = MCLK = PCLK = IDECLK = 62 MHz */ MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* FIXME: 50 MHz is spec limit */ mci_delay(); @@ -612,7 +620,7 @@ static int sd_select_bank(signed char bank) DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL); - MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT; + MCI_DATA_TIMER(INTERNAL_AS3525) = ((AS3525_IDE_FREQ) / 1000 * 250) /* 250 ms */; MCI_DATA_LENGTH(INTERNAL_AS3525) = 512; MCI_DATA_CTRL(INTERNAL_AS3525) = (1<<0) /* enable */ | (0<<1) /* transfer direction */ | diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 560e067510..319b9f57f0 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h @@ -113,14 +113,15 @@ #define AS3525_DBOP_DIV (CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ) - 1) /*div=1/(n+1)*/ #define AS3525_I2C_PRESCALER CLK_DIV(AS3525_PCLK_FREQ, AS3525_I2C_FREQ) #define AS3525_I2C_FREQ 400000 + + /* For now use same divider for ident frequencies on both internal and uSD cards */ #define AS3525_SD_IDENT_DIV ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SD_IDENT_FREQ) / 2) - 1) #define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */ #define AS3525_IDE_SEL AS3525_CLK_PLLA /* Input Source */ #define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/ -#define AS3525_IDE_FREQ 90000000 /* The OF uses 66MHz maximal freq - but sd transfers fail on some - players with this limit */ + /* for now use IDECLK == PCLK for consistency */ +#define AS3525_IDE_FREQ AS3525_PCLK_FREQ /* The OF uses 66MHz maximal freq */ //#define AS3525_USB_SEL AS3525_CLK_PLLA /* Input Source */ //#define AS3525_USB_DIV /* div = 1/(n=0?1:2n)*/ diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c index d8d3e013e2..4775278102 100644 --- a/firmware/target/arm/as3525/debug-as3525.c +++ b/firmware/target/arm/as3525/debug-as3525.c @@ -183,9 +183,9 @@ int calc_freq(int clk) if(!(MCI_NAND & (1<<8))) return 0; else if(MCI_NAND & (1<<10)) - return calc_freq(CLK_PCLK); + return calc_freq(CLK_IDE); else - return calc_freq(CLK_PCLK)/(((MCI_NAND & 0xff)+1)*2); + return calc_freq(CLK_IDE)/(((MCI_NAND & 0xff)+1)*2); case CLK_SD_MCLK_MSD: if(!(MCI_SD & (1<<8))) return 0; @@ -222,7 +222,7 @@ bool __dbg_hw_info(void) { int line; int last_nand = 0; -#if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2) +#ifdef HAVE_MULTIDRIVE int last_sd = 0; #endif @@ -293,10 +293,10 @@ bool __dbg_hw_info(void) last_nand = MCI_NAND; /* MCLK == PCLK */ lcd_putsf(0, line++, "SD :%3dMHz %3dMHz", - ((last_nand ? (AS3525_PCLK_FREQ/ 1000000): 0) / + ((last_nand ? (AS3525_IDE_FREQ/ 1000000): 0) / ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))), calc_freq(CLK_SD_MCLK_NAND)/1000000); -#if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2) +#ifdef HAVE_MULTIDRIVE if(MCI_SD) last_sd = MCI_SD; lcd_putsf(0, line++, "uSD :%3dMHz %3dMHz", |