diff options
| -rw-r--r-- | firmware/export/system.h | 4 | ||||
| -rw-r--r-- | firmware/system.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h index e4de5889c5..8ab2ac7174 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h @@ -289,7 +289,11 @@ static inline void invalidate_icache(void) #define CPUFREQ_DEFAULT (CPUFREQ_DEFAULT_MULT * CPU_FREQ) #define CPUFREQ_NORMAL_MULT 4 #define CPUFREQ_NORMAL (CPUFREQ_NORMAL_MULT * CPU_FREQ) +#ifdef IRIVER_H300_SERIES +#define CPUFREQ_MAX_MULT 8 +#else #define CPUFREQ_MAX_MULT 11 +#endif #define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ) #elif CONFIG_CPU == PP5020 diff --git a/firmware/system.c b/firmware/system.c index 5e8a7cd4d7..a6474549f5 100644 --- a/firmware/system.c +++ b/firmware/system.c @@ -599,7 +599,11 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); +#ifdef IRIVER_H300_SERIES + PLLCR = 0x1183e005; +#else PLLCR = 0x11856005; +#endif CSCR0 = 0x00001180; /* Flash: 4 wait states */ CSCR1 = 0x00000980; /* LCD: 2 wait states */ while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. |