diff options
| -rw-r--r-- | firmware/export/config/sansaclip.h | 2 | ||||
| -rw-r--r-- | firmware/export/config/sansae200v2.h | 2 | ||||
| -rw-r--r-- | firmware/export/config/sansafuze.h | 2 | ||||
| -rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 22 | ||||
| -rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 18 |
5 files changed, 19 insertions, 27 deletions
diff --git a/firmware/export/config/sansaclip.h b/firmware/export/config/sansaclip.h index d43fa898b0..7427d623fb 100644 --- a/firmware/export/config/sansaclip.h +++ b/firmware/export/config/sansaclip.h @@ -154,7 +154,7 @@ /* #define HAVE_POWEROFF_WHILE_CHARGING */ /* define current usage levels (based on battery bench) */ -#define CURRENT_NORMAL 42 +#define CURRENT_NORMAL 37 #define CURRENT_BACKLIGHT 13 #define CURRENT_RECORD CURRENT_NORMAL diff --git a/firmware/export/config/sansae200v2.h b/firmware/export/config/sansae200v2.h index 1b7d76e650..03711990a9 100644 --- a/firmware/export/config/sansae200v2.h +++ b/firmware/export/config/sansae200v2.h @@ -158,7 +158,7 @@ #define CONFIG_I2C I2C_AS3525 /* define current usage levels (based on battery bench) */ -#define CURRENT_NORMAL 45 +#define CURRENT_NORMAL 44 #define CURRENT_BACKLIGHT 30 #define CURRENT_RECORD CURRENT_NORMAL diff --git a/firmware/export/config/sansafuze.h b/firmware/export/config/sansafuze.h index e2b3fa8aaa..2f0073fc53 100644 --- a/firmware/export/config/sansafuze.h +++ b/firmware/export/config/sansafuze.h @@ -162,7 +162,7 @@ #define CONFIG_I2C I2C_AS3525 /* define current usage levels (based on battery bench) */ -#define CURRENT_NORMAL 37 +#define CURRENT_NORMAL 35 #define CURRENT_BACKLIGHT 30 #define CURRENT_RECORD CURRENT_NORMAL diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 7c388ad6c9..97d6edb3d1 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h @@ -139,7 +139,6 @@ #define AS3525_FCLK_POSTDIV (CLK_DIV((AS3525_PLLA_FREQ*(8-AS3525_FCLK_PREDIV)/8), AS3525_FCLK_FREQ) - 1) /*div=1/(n+1)*/ #if CONFIG_CPU == AS3525v2 -/* On as3525v2 we change fclk by writing to CGU_PROC */ #define AS3525_FCLK_POSTDIV_UNBOOSTED (CLK_DIV((AS3525_PLLA_FREQ*(8-AS3525_FCLK_PREDIV)/8), CPUFREQ_NORMAL) - 1) /*div=1/(n+1) */ /* Since pclk is based on fclk, we need to change CGU_PERI as well */ #define AS3525_PCLK_DIV0_UNBOOSTED (CLK_DIV(CPUFREQ_NORMAL, AS3525_DRAM_FREQ) - 1) /*div=1/(n+1)*/ @@ -164,21 +163,18 @@ /* PCLK */ -/* Figure out if we need to use asynchronous bus */ -#if ((CONFIG_CPU == AS3525) && (AS3525_FCLK_FREQ % AS3525_PCLK_FREQ)) -#define ASYNCHRONOUS_BUS /* Boosted mode asynchronous */ -#endif - -#ifdef ASYNCHRONOUS_BUS -#define AS3525_PCLK_SEL AS3525_CLK_PLLA /* PLLA input for asynchronous */ -#define AS3525_PCLK_DIV0 (CLK_DIV(AS3525_PLLA_FREQ, AS3525_DRAM_FREQ) - 1)/*div=1/(n+1)*/ -#else /* ASYNCHRONOUS_BUS */ -#define AS3525_PCLK_SEL AS3525_CLK_FCLK /* Fclk input for synchronous */ -#define AS3525_PCLK_DIV0 (CLK_DIV(AS3525_FCLK_FREQ, AS3525_DRAM_FREQ) - 1) /*div=1/(n+1)*/ -#endif /* ASYNCHRONOUS_BUS */ +#if CONFIG_CPU == AS3525 +#define AS3525_PCLK_SEL AS3525_CLK_PLLA /*unable to use AS3525_PCLK_DIV1 != 0 successfuly so far*/ #define AS3525_PCLK_DIV1 (CLK_DIV(AS3525_DRAM_FREQ, AS3525_PCLK_FREQ) - 1)/* div = 1/(n+1)*/ +#define AS3525_PCLK_DIV0 (CLK_DIV(AS3525_PLLA_FREQ, AS3525_DRAM_FREQ) - 1) /*div=1/(n+1)*/ +#else + +#define AS3525_PCLK_SEL AS3525_CLK_FCLK +#define AS3525_PCLK_DIV0 (CLK_DIV(AS3525_FCLK_FREQ, AS3525_DRAM_FREQ) - 1) /*div=1/(n+1)*/ + +#endif /* CONFIG_CPU */ /* PCLK as Source */ #define AS3525_DBOP_DIV (CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ) - 1) /*div=1/(n+1)*/ diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 50ce697656..01534abb3c 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c @@ -262,11 +262,7 @@ void system_init(void) #endif AS3525_PCLK_SEL); -#if CONFIG_CPU == AS3525 - cpu_frequency = CPUFREQ_DEFAULT; /* fastbus */ -#else - cpu_frequency = CPUFREQ_MAX; -#endif + set_cpu_frequency(CPUFREQ_DEFAULT); #if 0 /* the GPIO clock is already enabled by the dualboot function */ CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; @@ -367,16 +363,14 @@ void set_cpu_frequency(long frequency) while(adc_read(ADC_CVDD) < 470); /* 470 * .0025 = 1.175V */ #endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ + CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | + (AS3525_FCLK_PREDIV << 2) | + AS3525_FCLK_SEL); + asm volatile( "mrc p15, 0, r0, c1, c0 \n" - -#ifdef ASYNCHRONOUS_BUS - "orr r0, r0, #3<<30 \n" /* asynchronous bus clocking */ -#else "bic r0, r0, #3<<30 \n" /* clear bus bits */ "orr r0, r0, #1<<30 \n" /* synchronous bus clocking */ -#endif - "mcr p15, 0, r0, c1, c0 \n" : : : "r0" ); @@ -390,6 +384,8 @@ void set_cpu_frequency(long frequency) "mcr p15, 0, r0, c1, c0 \n" : : : "r0" ); + /* FCLK is unused so put it to the lowest freq we can */ + CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN); #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE /* Decreasing frequency so reduce voltage after change */ |