Move setjmp to lib and add setjmp for sh (imported from newlib) and compile it as separate library.

It's used by both, plugins and codecs, and sh/hwcodec doesn't compile codecs
so it doesn't fit into sources.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27869 a1c6a512-1295-4272-9138-f99709370657

9 files changed, 1524 insertions, 0 deletions

diff --git a/lib/libsetjmp/LICENSE b/lib/libsetjmp/LICENSE
new file mode 100644
index 0000000000..cf903b5062
--- /dev/null
+++ b/lib/libsetjmp/LICENSE
@@ -0,0 +1,830 @@
+The newlib subdirectory is a collection of software from several sources.
+
+Each file may have its own copyright/license that is embedded in the source 
+file.  Unless otherwise noted in the body of the source file(s), the following copyright
+notices will apply to the contents of the newlib subdirectory:
+
+(1) Red Hat Incorporated
+
+Copyright (c) 1994-2009  Red Hat, Inc. All rights reserved.
+
+This copyrighted material is made available to anyone wishing to use,
+modify, copy, or redistribute it subject to the terms and conditions
+of the BSD License.   This program is distributed in the hope that 
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+permission of Red Hat, Inc.
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+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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+Permission to use, copy, modify, and distribute this software for any
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+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+(14) Alexey Zelkin
+
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+1. Redistributions of source code must retain the above copyright
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+   documentation and/or other materials provided with the distribution.
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+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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+
+(15) Andrey A. Chernov
+
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+All rights reserved.
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+Redistribution and use in source and binary forms, with or without
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+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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+
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+SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
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+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
+
+(19) Todd C. Miller
+
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+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
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+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+(20) DJ Delorie (i386)
+Copyright (C) 1991 DJ Delorie
+All rights reserved.
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+
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+
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+
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+
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+
+To anyone who acknowledges that this file is provided "AS IS"
+without any express or implied warranty:
+    permission to use, copy, modify, and distribute this file
+for any purpose is hereby granted without fee, provided that
+the above copyright notice and this notice appears in all
+copies, and that the name of Hewlett-Packard Company not be
+used in advertising or publicity pertaining to distribution
+of the software without specific, written prior permission.
+Hewlett-Packard Company makes no representations about the
+suitability of this software for any purpose.
+
+(25) Henry Spencer (only *-linux targets)
+
+Copyright 1992, 1993, 1994 Henry Spencer.  All rights reserved.
+This software is not subject to any license of the American Telephone
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+
+Permission is granted to anyone to use this software for any purpose on
+any computer system, and to alter it and redistribute it, subject
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+
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+   ever read sources, credits must appear in the documentation.
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+4. This notice may not be removed or altered.
+
+(26) Mike Barcroft
+
+Copyright (c) 2001 Mike Barcroft <mike@FreeBSD.org>
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
+
+(27) Konstantin Chuguev (--enable-newlib-iconv)
+
+Copyright (c) 1999, 2000
+   Konstantin Chuguev.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
+
+   iconv (Charset Conversion Library) v2.0
+
+(28) Artem Bityuckiy (--enable-newlib-iconv)
+
+Copyright (c) 2003, Artem B. Bityuckiy, SoftMine Corporation.
+Rights transferred to Franklin Electronic Publishers.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
+
+(29) IBM, Sony, Toshiba (only spu-* targets)
+
+  (C) Copyright 2001,2006,
+  International Business Machines Corporation,
+  Sony Computer Entertainment, Incorporated,
+  Toshiba Corporation,
+
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+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
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+      this list of conditions and the following disclaimer.
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+      documentation and/or other materials provided with the distribution.
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+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE.
+
+(30) - Alex Tatmanjants (targets using libc/posix)
+
+  Copyright (c) 1995 Alex Tatmanjants <alex@elvisti.kiev.ua>
+ 		at Electronni Visti IA, Kiev, Ukraine.
+ 			All rights reserved.
+ 
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+  1. Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+  2. Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+ 
+  THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
+  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+  SUCH DAMAGE.
+
+(31) - M. Warner Losh (targets using libc/posix)
+
+  Copyright (c) 1998, M. Warner Losh <imp@freebsd.org>
+  All rights reserved.
+ 
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+  1. Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+  2. Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+ 
+  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+  SUCH DAMAGE.
+
+(32) - Andrey A. Chernov (targets using libc/posix)
+
+  Copyright (C) 1996 by Andrey A. Chernov, Moscow, Russia.
+  All rights reserved.
+ 
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+  1. Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+  2. Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+ 
+  THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
+  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+  SUCH DAMAGE.
+
+(33) - Daniel Eischen (targets using libc/posix)
+
+  Copyright (c) 2001 Daniel Eischen <deischen@FreeBSD.org>.
+  All rights reserved.
+ 
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+  1. Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+  2. Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+ 
+  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+  SUCH DAMAGE.
+
+
+(34) - Jon Beniston (only lm32-* targets)
+
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+ 1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ SUCH DAMAGE.
+
+
+(35) - ARM Ltd (arm and thumb variant targets only)
+
+ Copyright (c) 2009 ARM Ltd
+ All rights reserved.
+ 
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+ 1. Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+ 2. Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+ 3. The name of the company may not be used to endorse or promote
+    products derived from this software without specific prior written
+    permission.
+
+ THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+(36) - Xilinx, Inc. (micrroblaze-* and powerpc-* targets)
+
+Copyright (c) 2004, 2009 Xilinx, Inc.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+1.  Redistributions source code must retain the above copyright notice,
+this list of conditions and the following disclaimer.
+
+2.  Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+3.  Neither the name of Xilinx nor the names of its contributors may be
+used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
diff --git a/lib/libsetjmp/SOURCES b/lib/libsetjmp/SOURCES
new file mode 100644
index 0000000000..aa0ac46a23
--- /dev/null
+++ b/lib/libsetjmp/SOURCES
@@ -0,0 +1,19 @@
+#if (CONFIG_PLATFORM & PLATFORM_NATIVE)
+
+#ifdef CPU_ARM
+arm/setjmp.S
+#endif
+
+#ifdef CPU_COLDFIRE
+m68k/setjmp.S
+#endif
+
+#ifdef CPU_SH
+sh/setjmp.S
+#endif
+
+#ifdef CPU_MIPS
+mips/setjmp.S
+#endif
+
+#endif
diff --git a/lib/libsetjmp/arm/setjmp.S b/lib/libsetjmp/arm/setjmp.S
new file mode 100644
index 0000000000..ee5ebd9169
--- /dev/null
+++ b/lib/libsetjmp/arm/setjmp.S
@@ -0,0 +1,174 @@
+/* This is a simple version of setjmp and longjmp.
+
+   Nick Clifton, Cygnus Solutions, 13 June 1997.  */
+
+/* ANSI concatenation macros.  */
+#define CONCAT(a, b)  CONCAT2(a, b)
+#define CONCAT2(a, b) a##b
+
+#ifndef __USER_LABEL_PREFIX__
+#error  __USER_LABEL_PREFIX__ not defined
+#endif
+
+#define SYM(x) CONCAT (__USER_LABEL_PREFIX__, x)
+
+#ifdef __ELF__
+#define TYPE(x) .type SYM(x),function
+#define SIZE(x) .size SYM(x), . - SYM(x)
+#else
+#define TYPE(x)
+#define SIZE(x)
+#endif
+
+/* Arm/Thumb interworking support:
+
+   The interworking scheme expects functions to use a BX instruction
+   to return control to their parent.  Since we need this code to work
+   in both interworked and non-interworked environments as well as with
+   older processors which do not have the BX instruction we do the 
+   following:
+    Test the return address.
+    If the bottom bit is clear perform an "old style" function exit.
+    (We know that we are in ARM mode and returning to an ARM mode caller).
+    Otherwise use the BX instruction to perform the function exit.
+
+   We know that we will never attempt to perform the BX instruction on 
+   an older processor, because that kind of processor will never be 
+   interworked, and a return address with the bottom bit set will never 
+   be generated.
+
+   In addition, we do not actually assemble the BX instruction as this would
+   require us to tell the assembler that the processor is an ARM7TDMI and
+   it would store this information in the binary.  We want this binary to be
+   able to be linked with binaries compiled for older processors however, so
+   we do not want such information stored there.  
+
+   If we are running using the APCS-26 convention however, then we never
+   test the bottom bit, because this is part of the processor status.  
+   Instead we just do a normal return, since we know that we cannot be 
+   returning to a Thumb caller - the Thumb does not support APCS-26.
+    
+   Function entry is much simpler.  If we are compiling for the Thumb we 
+   just switch into ARM mode and then drop through into the rest of the
+   function.  The function exit code will take care of the restore to
+   Thumb mode.
+   
+   For Thumb-2 do everything in Thumb mode.  */
+
+#ifdef __APCS_26__
+#define RET movs        pc, lr
+#elif defined(__thumb2__)
+#define RET bx lr
+#elif !defined(ROCKBOX_SUPPORTS_AN_ARMV4_NON_T_CPU)
+#define RET bx lr   /* BX exists on v4T, v5 and more recent architectures */
+#else
+#define RET tst     lr, #1; \
+            moveq       pc, lr ; \
+.word           0xe12fff1e  /* bx lr */
+#endif
+
+#ifdef __thumb2__
+.macro COND where when 
+    i\where \when
+.endm
+#else
+.macro COND where when 
+.endm
+#endif
+
+#if defined(__thumb2__)
+.syntax unified
+.macro MODE
+    .thumb
+    .thumb_func
+.endm
+.macro PROLOGUE name
+.endm
+
+#elif defined(__thumb__)
+#define MODE        .thumb_func
+.macro PROLOGUE name
+    .code 16
+    bx  pc
+    nop 
+    .code 32
+SYM (.arm_start_of.\name):
+.endm
+#else /* Arm */
+#define MODE        .code 32
+.macro PROLOGUE name
+.endm
+#endif
+    
+.macro FUNC_START name
+    .text
+    .align 2
+    MODE
+    .globl SYM (\name)
+    TYPE (\name)
+SYM (\name):
+    PROLOGUE \name
+.endm
+
+.macro FUNC_END name
+    RET
+    SIZE (\name)
+.endm
+    
+/* --------------------------------------------------------------------
+                 int setjmp (jmp_buf); 
+   -------------------------------------------------------------------- */
+    
+    FUNC_START setjmp
+
+    /* Save all the callee-preserved registers into the jump buffer.  */
+#ifdef __thumb2__
+    stmea       a1!, { v1-v7, fp, ip, lr }
+    str     sp, [a1],#+4
+#else
+    stmea       a1!, { v1-v7, fp, ip, sp, lr }
+#endif
+    
+#if 0   /* Simulator does not cope with FP instructions yet.  */
+#ifndef __SOFTFP__
+    /* Save the floating point registers.  */
+    sfmea       f4, 4, [a1]
+#endif
+#endif      
+    /* When setting up the jump buffer return 0.  */
+    mov     a1, #0
+
+    FUNC_END setjmp
+    
+/* --------------------------------------------------------------------
+        volatile void longjmp (jmp_buf, int);
+   -------------------------------------------------------------------- */
+    
+    FUNC_START longjmp
+
+    /* If we have stack extension code it ought to be handled here.  */
+    
+    /* Restore the registers, retrieving the state when setjmp() was called.  */
+#ifdef __thumb2__
+    ldmfd       a1!, { v1-v7, fp, ip, lr }
+    ldr     sp, [a1],#+4
+#else
+    ldmfd       a1!, { v1-v7, fp, ip, sp, lr }
+#endif
+    
+#if 0   /* Simulator does not cope with FP instructions yet.  */
+#ifndef __SOFTFP__
+    /* Restore floating point registers as well.  */
+    lfmfd       f4, 4, [a1]
+#endif
+#endif  
+    /* Put the return value into the integer result register.
+       But if it is zero then return 1 instead.  */ 
+    movs        a1, a2
+#ifdef __thumb2__
+    it      eq
+#endif
+    moveq       a1, #1
+
+    FUNC_END longjmp
+
diff --git a/lib/libsetjmp/libsetjmp.make b/lib/libsetjmp/libsetjmp.make
new file mode 100644
index 0000000000..b7d4cad25f
--- /dev/null
+++ b/lib/libsetjmp/libsetjmp.make
@@ -0,0 +1,21 @@
+#             __________               __   ___.
+#   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+#   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+#   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+#   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+#                     \/            \/     \/    \/            \/
+#
+
+SETJMP_DIR = $(ROOTDIR)/lib/libsetjmp
+SETJMP_SRC = $(call preprocess, $(SETJMP_DIR)/SOURCES)
+SETJMP_OBJ := $(call c2obj, $(SETJMP_SRC))
+
+OTHER_SRC += $(SETJMP_SRC)
+
+LIBSETJMP = $(BUILDDIR)/lib/libsetjmp.a
+
+INCLUDES += -I$(SETJMP_DIR)
+
+$(LIBSETJMP): $(SETJMP_OBJ)
+	$(SILENT)$(shell rm -f $@)
+	$(call PRINTS,AR $(@F))$(AR) rcs $@ $^ >/dev/null
diff --git a/lib/libsetjmp/m68k/setjmp.S b/lib/libsetjmp/m68k/setjmp.S
new file mode 100644
index 0000000000..86eda8079c
--- /dev/null
+++ b/lib/libsetjmp/m68k/setjmp.S
@@ -0,0 +1,79 @@
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+
+
+.global SYM (setjmp)
+.global SYM (longjmp)
+
+SYM (setjmp):
+    moveal sp@(4),a0
+    movel sp@(0),a0@(12)
+    movel sp,a0@(8)
+    moveml d2-d7/a2-a6,a0@(20)
+    clrl d0
+    rts
+
+SYM (longjmp):
+    moveal sp@(4),a0
+    movel sp@(8),d0
+    bne 1f
+    movel &1,d0
+1:
+    moveml a0@(20),d2-d7/a2-a6
+    moveal a0@(8),sp
+    movel a0@(12),sp@
+    rts
+
+#ifdef M68881
+.global SYM (setjmp_68881)
+.global SYM (longjmp_68881)
+
+SYM (setjmp_68881):
+    moveal sp@(4),a0
+    movel sp@(0),a0@(12)
+    movel sp,a0@(8)
+    moveml d2-d7/a2-a6,a0@(20)
+    fmovemx fp2-fp7,a0@(64)
+    clrl d0
+    rts
+
+SYM (longjmp_68881):
+    moveal sp@(4),a0
+    fmovemx a0@(64),fp2-fp7
+    movel sp@(8),d0
+    bne 1f
+    movel &1,d0
+1:
+    moveml a0@(20),d2-d7/a2-a6
+    moveal a0@(8),sp
+    movel a0@(12),sp@
+    rts
+#endif
diff --git a/lib/libsetjmp/mips/setjmp.S b/lib/libsetjmp/mips/setjmp.S
new file mode 100644
index 0000000000..7fa127a7a4
--- /dev/null
+++ b/lib/libsetjmp/mips/setjmp.S
@@ -0,0 +1,101 @@
+#include "config.h"
+#include "mips.h"
+
+/* This is a simple version of setjmp and longjmp for MIPS 32 and 64.
+
+   Ian Lance Taylor, Cygnus Support, 13 May 1993.  */
+
+#ifdef __mips16
+/* This file contains 32 bit assembly code.  */
+        .set nomips16
+#endif
+
+#define GPR_LAYOUT                  \
+        GPR_OFFSET ($16, 0);        \
+        GPR_OFFSET ($17, 1);        \
+        GPR_OFFSET ($18, 2);        \
+        GPR_OFFSET ($19, 3);        \
+        GPR_OFFSET ($20, 4);        \
+        GPR_OFFSET ($21, 5);        \
+        GPR_OFFSET ($22, 6);        \
+        GPR_OFFSET ($23, 7);        \
+        GPR_OFFSET ($29, 8);        \
+        GPR_OFFSET ($30, 9);        \
+        GPR_OFFSET ($31, 10)
+
+#define NUM_GPRS_SAVED 11
+
+#ifdef __mips_hard_float
+#define FPR_LAYOUT                   \
+        FPR_OFFSET ($f20, 0);        \
+        FPR_OFFSET ($f21, 1);        \
+        FPR_OFFSET ($f22, 2);        \
+        FPR_OFFSET ($f23, 3);        \
+        FPR_OFFSET ($f24, 4);        \
+        FPR_OFFSET ($f25, 5);        \
+        FPR_OFFSET ($f26, 6);        \
+        FPR_OFFSET ($f27, 7);        \
+        FPR_OFFSET ($f28, 8);        \
+        FPR_OFFSET ($f29, 9);        \
+        FPR_OFFSET ($f30, 10);       \
+        FPR_OFFSET ($f31, 11)
+#else
+#define FPR_LAYOUT
+#endif
+
+#if CPU_MIPS == 64
+#define BYTES_PER_WORD 8
+#define LOAD_GPR  ld
+#define LOAD_FPR  ldc1
+#define STORE_GPR sd
+#define STORE_FPR sdc1
+#else
+#define BYTES_PER_WORD 4
+#define LOAD_GPR  lw
+#define LOAD_FPR  lwc1
+#define STORE_GPR sw
+#define STORE_FPR swc1
+#endif
+
+#define GPOFF(INDEX) (INDEX * BYTES_PER_WORD)
+#define FPOFF(INDEX) ((INDEX + NUM_GPRS_SAVED) * BYTES_PER_WORD)
+
+/* int setjmp (jmp_buf);  */
+        .globl      setjmp
+        .ent        setjmp
+setjmp:
+        .frame      sp, 0, ra
+
+#define GPR_OFFSET(REG, INDEX) STORE_GPR REG,GPOFF(INDEX)(a0)
+#define FPR_OFFSET(REG, INDEX) STORE_FPR REG,FPOFF(INDEX)(a0)
+        GPR_LAYOUT
+        FPR_LAYOUT
+#undef GPR_OFFSET
+#undef FPR_OFFSET
+
+        move        v0, $0
+        j           ra
+
+        .end        setjmp
+
+/* volatile void longjmp (jmp_buf, int);  */
+        .globl      longjmp
+        .ent        longjmp
+longjmp:
+        .frame      sp, 0, ra
+
+#define GPR_OFFSET(REG, INDEX) LOAD_GPR REG,GPOFF(INDEX)(a0)
+#define FPR_OFFSET(REG, INDEX) LOAD_FPR REG,FPOFF(INDEX)(a0)
+        GPR_LAYOUT
+        FPR_LAYOUT
+#undef GPR_OFFSET
+#undef FPR_OFFSET
+
+        bne        a1, $0, 1f
+        li         a1, 1
+1:
+        move       v0, a1
+        j          ra
+
+        .end       longjmp
+
diff --git a/lib/libsetjmp/setjmp.h b/lib/libsetjmp/setjmp.h
new file mode 100644
index 0000000000..f1f5d6a89e
--- /dev/null
+++ b/lib/libsetjmp/setjmp.h
@@ -0,0 +1,64 @@
+#ifndef _SETJMP_H_
+#define _SETJMP_H_
+
+/* Combined parts of include/setjmp.h and include/machine/setjmp.h in 
+ * newlib 1.17.0, with minor changes for Rockbox.
+ */
+
+#include "config.h"
+#ifdef CPU_ARM
+/*
+ * All callee preserved registers:
+ * v1 - v7, fp, ip, sp, lr, f4, f5, f6, f7
+ */
+#define _JBLEN 23
+#endif
+
+/* necv70 was 9 as well. */
+
+#ifdef CPU_COLDFIRE
+/*
+ * onsstack,sigmask,sp,pc,psl,d2-d7,a2-a6,
+ * fp2-fp7  for 68881.
+ * All else recovered by under/over(flow) handling.
+ */
+#define _JBLEN  34
+#endif
+
+#ifdef CPU_MIPS
+#if CPU_MIPS == 64
+#define _JBTYPE long long
+#endif
+#ifdef __mips_soft_float
+#define _JBLEN 11
+#else
+#define _JBLEN 23
+#endif
+#endif
+
+#ifdef  CPU_SH
+#define __SH5__ 0
+#if __SH5__
+#define _JBLEN 50
+#define _JBTYPE long long
+#else
+/* r8 through r15 (callee saved), pr, fp regs if available */
+#define _JBLEN 20
+#endif /* __SH5__ */
+#endif
+
+#ifdef _JBLEN
+#ifdef _JBTYPE
+typedef _JBTYPE jmp_buf[_JBLEN];
+#else
+typedef int jmp_buf[_JBLEN];
+#endif
+#else
+typedef int jmp_buf;
+#endif
+
+
+extern void longjmp(jmp_buf __jmpb, int __retval);
+extern int  setjmp(jmp_buf __jmpb);
+
+#endif // _SETJMP_H_
diff --git a/lib/libsetjmp/sh/asm.h b/lib/libsetjmp/sh/asm.h
new file mode 100644
index 0000000000..db30b149b5
--- /dev/null
+++ b/lib/libsetjmp/sh/asm.h
@@ -0,0 +1,42 @@
+#ifdef __STDC__
+# define _C_LABEL(x)    _ ## x
+#else
+# define _C_LABEL(x)    _/**/x
+#endif
+#define _ASM_LABEL(x)   x
+
+#if __SH5__
+# if __SH5__ == 32 && __SHMEDIA__
+#  define TEXT .section .text..SHmedia32, "ax"
+# else
+#  define TEXT .text
+# endif
+
+# define _ENTRY(name)	\
+	TEXT; .balign 8; .globl name; name:
+#else
+#define _ENTRY(name)	\
+	.text; .align 2; .globl name; name:
+#endif /* __SH5__ */
+
+#define ENTRY(name)	\
+	_ENTRY(_C_LABEL(name))
+
+#if (defined (__sh2__) || defined (__SH2E__) || defined (__sh3__) || defined (__SH3E__) \
+     || defined (__SH4_SINGLE__) || defined (__SH4__)) \
+     || defined (__SH4_SINGLE_ONLY__) || defined (__SH5__) || defined (__SH2A__)
+#define DELAYED_BRANCHES
+#define SL(branch, dest, in_slot, in_slot_arg2) \
+	branch##.s dest; in_slot, in_slot_arg2
+#else
+#define SL(branch, dest, in_slot, in_slot_arg2) \
+	in_slot, in_slot_arg2; branch dest
+#endif
+
+#ifdef __LITTLE_ENDIAN__
+#define SHHI shlld
+#define SHLO shlrd
+#else
+#define SHHI shlrd
+#define SHLO shlld
+#endif
diff --git a/lib/libsetjmp/sh/setjmp.S b/lib/libsetjmp/sh/setjmp.S
new file mode 100644
index 0000000000..7df2054531
--- /dev/null
+++ b/lib/libsetjmp/sh/setjmp.S
@@ -0,0 +1,194 @@
+#include "config.h"
+#ifdef ROCKBOX_LITTLE_ENDIAN
+#define __LITTLE_ENDIAN__
+#endif
+
+/* SH7034, the only supported sh target supported by Rockbox is sh1 */
+#define __SH5__ 0
+#define __SHMEDIA__ 0
+
+/* below is unmodified setjmp.S revision 1.3 from newlib cvs */
+#if __SHMEDIA__
+	.mode	SHmedia
+#endif
+
+#include "asm.h"
+
+ENTRY(setjmp)
+#if __SH5__
+	ptabs	r18, tr0
+	gettr	tr5, r5
+	gettr	tr6, r6
+	gettr	tr7, r7
+	st.q	r2,  0*8, r18
+	st.q	r2,  1*8, r10
+	st.q	r2,  2*8, r11
+	st.q	r2,  3*8, r12
+	st.q	r2,  4*8, r13
+	st.q	r2,  5*8, r14
+	st.q	r2,  6*8, r15
+	st.q	r2,  7*8, r28
+	st.q	r2,  8*8, r29
+	st.q	r2,  9*8, r30
+	st.q	r2, 10*8, r31
+	st.q	r2, 11*8, r32
+	st.q	r2, 12*8, r33
+	st.q	r2, 13*8, r34
+	st.q	r2, 14*8, r35
+	st.q	r2, 15*8, r44
+	st.q	r2, 16*8, r45
+	st.q	r2, 17*8, r46
+	st.q	r2, 18*8, r47
+	st.q	r2, 19*8, r48
+	st.q	r2, 20*8, r49
+	st.q	r2, 21*8, r50
+	st.q	r2, 22*8, r51
+	st.q	r2, 23*8, r52
+	st.q	r2, 24*8, r53
+	st.q	r2, 25*8, r54
+	st.q	r2, 26*8, r55
+	st.q	r2, 27*8, r56
+	st.q	r2, 28*8, r57
+	st.q	r2, 29*8, r58
+	st.q	r2, 30*8, r59
+	st.q	r2, 31*8, r5
+	st.q	r2, 32*8, r6
+	st.q	r2, 33*8, r7
+#if ! __SH4_NOFPU__
+	fst.d	r2, 34*8, dr12
+	fst.d	r2, 35*8, dr14
+	fst.d	r2, 36*8, dr36
+	fst.d	r2, 37*8, dr38
+	fst.d	r2, 38*8, dr40
+	fst.d	r2, 39*8, dr42
+	fst.d	r2, 40*8, dr44
+	fst.d	r2, 41*8, dr46
+	fst.d	r2, 42*8, dr48
+	fst.d	r2, 43*8, dr50
+	fst.d	r2, 44*8, dr52
+	fst.d	r2, 45*8, dr54
+	fst.d	r2, 46*8, dr56
+	fst.d	r2, 47*8, dr58
+	fst.d	r2, 48*8, dr60
+	fst.d	r2, 49*8, dr62
+#endif
+	movi	0, r2
+	blink	tr0, r63
+#else
+#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
+	add	#(13*4),r4
+#else
+	add	#(9*4),r4
+#endif
+
+	sts.l	pr,@-r4
+
+#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
+	fmov.s	fr15,@-r4	! call saved floating point registers
+	fmov.s	fr14,@-r4
+	fmov.s	fr13,@-r4
+	fmov.s	fr12,@-r4
+#endif
+
+	mov.l	r15,@-r4	! call saved integer registers
+	mov.l	r14,@-r4
+	mov.l	r13,@-r4
+	mov.l	r12,@-r4
+
+	mov.l	r11,@-r4
+	mov.l	r10,@-r4
+	mov.l	r9,@-r4
+	mov.l	r8,@-r4
+
+	rts
+	mov    #0,r0
+#endif /* __SH5__ */
+
+ENTRY(longjmp)
+#if __SH5__
+	ld.q	r2,  0*8, r18
+	ptabs	r18, tr0
+	ld.q	r2,  1*8, r10
+	ld.q	r2,  2*8, r11
+	ld.q	r2,  3*8, r12
+	ld.q	r2,  4*8, r13
+	ld.q	r2,  5*8, r14
+	ld.q	r2,  6*8, r15
+	ld.q	r2,  7*8, r28
+	ld.q	r2,  8*8, r29
+	ld.q	r2,  9*8, r30
+	ld.q	r2, 10*8, r31
+	ld.q	r2, 11*8, r32
+	ld.q	r2, 12*8, r33
+	ld.q	r2, 13*8, r34
+	ld.q	r2, 14*8, r35
+	ld.q	r2, 15*8, r44
+	ld.q	r2, 16*8, r45
+	ld.q	r2, 17*8, r46
+	ld.q	r2, 18*8, r47
+	ld.q	r2, 19*8, r48
+	ld.q	r2, 20*8, r49
+	ld.q	r2, 21*8, r50
+	ld.q	r2, 22*8, r51
+	ld.q	r2, 23*8, r52
+	ld.q	r2, 24*8, r53
+	ld.q	r2, 25*8, r54
+	ld.q	r2, 26*8, r55
+	ld.q	r2, 27*8, r56
+	ld.q	r2, 28*8, r57
+	ld.q	r2, 29*8, r58
+	ld.q	r2, 30*8, r59
+	ld.q	r2, 31*8, r5
+	ld.q	r2, 32*8, r6
+	ld.q	r2, 33*8, r7
+	ptabs	r5, tr5
+	ptabs	r6, tr6
+	ptabs	r7, tr7
+#if ! __SH4_NOFPU__
+	fld.d	r2, 34*8, dr12
+	fld.d	r2, 35*8, dr14
+	fld.d	r2, 36*8, dr36
+	fld.d	r2, 37*8, dr38
+	fld.d	r2, 38*8, dr40
+	fld.d	r2, 39*8, dr42
+	fld.d	r2, 40*8, dr44
+	fld.d	r2, 41*8, dr46
+	fld.d	r2, 42*8, dr48
+	fld.d	r2, 43*8, dr50
+	fld.d	r2, 44*8, dr52
+	fld.d	r2, 45*8, dr54
+	fld.d	r2, 46*8, dr56
+	fld.d	r2, 47*8, dr58
+	fld.d	r2, 48*8, dr60
+	fld.d	r2, 49*8, dr62
+#endif
+	movi	1, r2
+	cmvne	r3, r3, r2
+	blink	tr0, r63
+#else
+	mov.l	@r4+,r8
+	mov.l	@r4+,r9
+	mov.l	@r4+,r10
+	mov.l	@r4+,r11
+
+	mov.l	@r4+,r12
+	mov.l	@r4+,r13
+	mov.l	@r4+,r14
+	mov.l	@r4+,r15
+
+#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
+	fmov.s	@r4+,fr12	! call saved floating point registers
+	fmov.s	@r4+,fr13
+	fmov.s	@r4+,fr14
+	fmov.s	@r4+,fr15
+#endif
+
+	lds.l	@r4+,pr
+
+	mov	r5,r0
+	tst	r0,r0
+	bf	retr4
+	movt	r0
+retr4:	rts
+	nop
+#endif /* __SH5__ */