diff options
| author | Linus Nielsen Feltzing <linus@haxx.se> | 2005-02-04 18:24:58 +0000 |
|---|---|---|
| committer | Linus Nielsen Feltzing <linus@haxx.se> | 2005-02-04 18:24:58 +0000 |
| commit | f1530d8a8267f6ff6686623f12da3c3cf33b9888 (patch) | |
| tree | d3c32fa680354a2fc0bc87ca6a10e41ab8ab7142 /firmware | |
| parent | b143652572219241950a2e9f953e3bc7be31e42c (diff) | |
Boot loader safety measures
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5791 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
| -rw-r--r-- | firmware/crt0.S | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/firmware/crt0.S b/firmware/crt0.S index 1f385d4ce5..339366582f 100644 --- a/firmware/crt0.S +++ b/firmware/crt0.S @@ -173,6 +173,21 @@ irq_handler: #ifdef BOOTLOADER + /* The cookie is not reset. This must mean that the boot loader + has crashed. Let's start the original firmware immediately. */ + lea 0x10017ffc,%a2 + move.l (%a2),%d0 + move.l #0xc0015a17,%d1 + cmp.l %d0,%d1 + bne .nocookie + /* Clear the cookie again */ + move.l #0,(%a2) + jmp 8 + +.nocookie: + /* Set the cookie */ + move.l %d1,(%a2) + /* Set up the DRAM controller. The refresh is based on the 11.2896MHz clock (5.6448MHz bus frequency). We haven't yet started the PLL */ move.l #0x80050000,%d0 |