diff options
author | Rafaël Carré <rafael.carre@gmail.com> | 2010-04-13 14:12:54 +0000 |
---|---|---|
committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-04-13 14:12:54 +0000 |
commit | a0e1e329f7f3c1c428d53188856063334847e18c (patch) | |
tree | 790c62b5d773d8aac1652ce48bf509c163813cbe /firmware | |
parent | 88148f39f67a050e05a4cef08c1130d69020faba (diff) |
mmu-arm (v4/v5) : use one less instruction in invalidate_dcache/clean_dcache
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25625 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/target/arm/mmu-arm.S | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/firmware/target/arm/mmu-arm.S b/firmware/target/arm/mmu-arm.S index 00e4c2b6ef..6b580b4524 100644 --- a/firmware/target/arm/mmu-arm.S +++ b/firmware/target/arm/mmu-arm.S @@ -275,10 +275,10 @@ clean_dcache_range: clean_dcache: cpucache_flush: @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ - mov r0, #0x00000000 @ + mov r1, #0x00000000 @ 1: @ clean_start @ mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index - add r0, r0, #0x00000020 @ + add r0, r1, #0x00000020 @ mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index add r0, r0, #0x00000020 @ mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index @@ -292,10 +292,9 @@ cpucache_flush: mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index add r0, r0, #0x00000020 @ mcr p15, 0, r0, c7, c10, 2 @ Clean entry by index - sub r0, r0, #0x000000e0 @ - adds r0, r0, #0x04000000 @ will wrap to zero at loop end + adds r1, r1, #0x04000000 @ will wrap to zero at loop end bne 1b @ clean_start @ - mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer + mcr p15, 0, r1, c7, c10, 4 @ Drain write buffer bx lr @ .size clean_dcache, .-clean_dcache @@ -310,10 +309,10 @@ cpucache_flush: .type invalidate_dcache, %function invalidate_dcache: @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ - mov r0, #0x00000000 @ + mov r1, #0x00000000 @ 1: @ inv_start @ mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index - add r0, r0, #0x00000020 @ + add r0, r1, #0x00000020 @ mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index add r0, r0, #0x00000020 @ mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index @@ -327,10 +326,9 @@ invalidate_dcache: mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index add r0, r0, #0x00000020 @ mcr p15, 0, r0, c7, c14, 2 @ Clean and invalidate entry by index - sub r0, r0, #0x000000e0 @ - adds r0, r0, #0x04000000 @ will wrap to zero at loop end + adds r1, r1, #0x04000000 @ will wrap to zero at loop end bne 1b @ inv_start @ - mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer + mcr p15, 0, r1, c7, c10, 4 @ Drain write buffer bx lr @ .size invalidate_dcache, .-invalidate_dcache @@ -346,8 +344,8 @@ invalidate_dcache: .global cpucache_invalidate @ Alias invalidate_idcache: cpucache_invalidate: - mov r1, lr @ save lr to r1, call uses r0 only + mov r2, lr @ save lr to r1, call uses r0 only bl invalidate_dcache @ Clean and invalidate entire DCache - mcr p15, 0, r0, c7, c5, 0 @ Invalidate ICache (r0=0 from call) - mov pc, r1 @ + mcr p15, 0, r1, c7, c5, 0 @ Invalidate ICache (r1=0 from call) + mov pc, r2 @ .size invalidate_idcache, .-invalidate_idcache |