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authorFrank Gevaerts <frank@gevaerts.be>2008-09-18 18:20:51 +0000
committerFrank Gevaerts <frank@gevaerts.be>2008-09-18 18:20:51 +0000
commit7983ab6cd01ee7b7f2421a0355df2b5008b9e122 (patch)
tree52ec181178308fcd64ae6773bc565155bf2276e4 /firmware
parent403427911cbc00478a88c4d14b5f7e6199cf7c11 (diff)
M3 (and probably non-sl M6) code gets loaded at 0x22020000 by dfu
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18546 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/target/arm/s5l8700/boot.lds12
1 files changed, 10 insertions, 2 deletions
diff --git a/firmware/target/arm/s5l8700/boot.lds b/firmware/target/arm/s5l8700/boot.lds
index 757abaa11a..6f0a809486 100644
--- a/firmware/target/arm/s5l8700/boot.lds
+++ b/firmware/target/arm/s5l8700/boot.lds
@@ -8,17 +8,25 @@ STARTUP(target/arm/s5l8700/crt0.o)
/* DRAMORIG is in fact 0x8000000 but remapped to 0x0 */
#define DRAMORIG 0x0
#define DRAMSIZE 16M
-#
+
#define IRAMORIG 0x22000000
#define IRAMSIZE 256K
+#ifdef MEIZU_M6SL
+#define DFULOADADDR IRAMORIG
+#else
+#define DFULOADADDR (IRAMORIG+0x20000)
+#endif
+
/* This is not available in all versions of the S5L8700 */
#define FLASHORIG 0x24000000
#define FLASHSIZE 1M
SECTIONS
{
- . = IRAMORIG;
+ /*. = IRAMORIG; */
+ /* As long as we don't flash the code, use the DFU load address */
+ . = DFULOADADDR;
.text : {
*(.init.text)