Remove Linux's mmci.h since the license is strict GPLv2

Rewrite a new header distributed under GPLv2 or later, and place it in
export/ in case other targets ship with an ARM PL180 controller

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18959 a1c6a512-1295-4272-9138-f99709370657

3 files changed, 85 insertions, 143 deletions

diff --git a/firmware/export/pl180.h b/firmware/export/pl180.h
new file mode 100644
index 0000000000..98993cc244
--- /dev/null
+++ b/firmware/export/pl180.h
@@ -0,0 +1,65 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright © 2008 Rafaël Carré
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+/* ARM PrimeCell PL180 SD/MMC controller */
+
+/* MCIStatus bits */
+#define MCI_CMD_CRC_FAIL    (1<<0)
+#define MCI_DATA_CRC_FAIL   (1<<1)
+#define MCI_CMD_TIMEOUT     (1<<2)
+#define MCI_DATA_TIMEOUT    (1<<3)
+#define MCI_TX_UNDERRUN     (1<<4)
+#define MCI_RX_OVERRUN      (1<<5)
+#define MCI_CMD_RESP_END    (1<<6)
+#define MCI_CMD_SENT        (1<<7)
+#define MCI_DATA_END        (1<<8)
+#define MCI_START_BIT_ERR   (1<<9)
+#define MCI_DATA_BLOCK_END  (1<<10)
+#define MCI_CMD_ACTIVE      (1<<11)
+
+
+/* MCIPower bits */
+#define MCI_POWER_OFF           0x0
+/* 0x1 is reserved */
+#define MCI_POWER_UP            0x2
+#define MCI_POWER_ON            0x3
+
+/* bits 5:2 are the voltage */
+
+#define MCI_POWER_OPEN_DRAIN    (1<<6)
+#define MCI_POWER_ROD           (1<<7)
+
+
+/* MCIClock bits */
+/* bits 7:0 are the clock divider */
+#define MCI_CLOCK_ENABLE        (1<<8)
+#define MCI_CLOCK_POWERSAVE     (1<<9)
+#define MCI_CLOCK_BYPASS        (1<<10)
+#define MCI_CLOCK_WIDEBUS       (1<<11)
+
+
+/* MCICommand bits */
+/* bits 5:0 are the command index */
+#define MCI_COMMAND_RESPONSE        (1<<6)
+#define MCI_COMMAND_LONG_RESPONSE   (1<<7)
+#define MCI_COMMAND_INTERRUPT       (1<<8)
+#define MCI_COMMAND_PENDING         (1<<9)
+#define MCI_COMMAND_ENABLE          (1<<10)
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c
index 2b8578ff59..3dea237a5d 100644
--- a/firmware/target/arm/as3525/ata_sd_as3525.c
+++ b/firmware/target/arm/as3525/ata_sd_as3525.c
@@ -24,7 +24,7 @@
 #include "config.h" /* for HAVE_MULTIVOLUME */
 
 #include "as3525.h"
-#include "mmci.h"
+#include "pl180.h"
 #include "panic.h"
 #include "stdbool.h"
 #include "ata.h"
@@ -87,7 +87,7 @@ static void mci_set_clock_divider(const int drive, int divider)
     if(divider > 1)
     {
         /* use divide logic */
-        clock &= ~MCI_CLK_BYPASS;
+        clock &= ~MCI_CLOCK_BYPASS;
 
         /* convert divider to MMC_CLOCK logic */
         divider = (divider/2) - 1;
@@ -97,7 +97,7 @@ static void mci_set_clock_divider(const int drive, int divider)
     else
     {
         /* bypass dividing logic */
-        clock |= MCI_CLK_BYPASS;
+        clock |= MCI_CLOCK_BYPASS;
         divider = 0;
     }
 
@@ -110,20 +110,20 @@ static int send_cmd(const int drive, struct mmc_command *cmd)
 {
     int val, status;
 
-    while(MMC_STATUS(drive) & MCI_CMDACTIVE); /* useless */
+    while(MMC_STATUS(drive) & MCI_CMD_ACTIVE); /* useless */
 
-    if(MMC_COMMAND(drive) & MCI_CPSM_ENABLE) /* clears existing command */
+    if(MMC_COMMAND(drive) & MCI_COMMAND_ENABLE) /* clears existing command */
     {
         MMC_COMMAND(drive) = 0;
         mci_delay();
     }
 
-    val = cmd->cmd | MCI_CPSM_ENABLE;
+    val = cmd->cmd | MCI_COMMAND_ENABLE;
     if(cmd->flags & MMC_RESP)
     {
-        val |= MCI_CPSM_RESPONSE;
+        val |= MCI_COMMAND_RESPONSE;
         if(cmd->flags & MMC_LONG_RESP)
-            val |= MCI_CPSM_LONGRSP;
+            val |= MCI_COMMAND_LONG_RESPONSE;
     }
 
     MMC_CLEAR(drive) = 0x7ff;
@@ -131,7 +131,7 @@ static int send_cmd(const int drive, struct mmc_command *cmd)
     MMC_ARGUMENT(drive) = (cmd->flags & MMC_ARG) ? cmd->arg : 0;
     MMC_COMMAND(drive) = val;
 
-    while(MMC_STATUS(drive) & MCI_CMDACTIVE);
+    while(MMC_STATUS(drive) & MCI_CMD_ACTIVE);
 
     MMC_COMMAND(drive) = 0;
     MMC_ARGUMENT(drive) = ~0;
@@ -141,13 +141,13 @@ static int send_cmd(const int drive, struct mmc_command *cmd)
         status = MMC_STATUS(drive);
         if(cmd->flags & MMC_RESP)
         {
-            if(status & MCI_CMDTIMEOUT)
+            if(status & MCI_CMD_TIMEOUT)
             {
                 if(cmd->cmd == SEND_IF_COND)
                     break; /* SDHC test can fail */
                 panicf("Response timeout");
             }
-            else if(status & (MCI_CMDCRCFAIL|MCI_CMDRESPEND))
+            else if(status & (MCI_CMD_CRC_FAIL|MCI_CMD_RESP_END))
             {   /* resp received */
                 cmd->resp[0] = MMC_RESP0(drive);
                 if(cmd->flags & MMC_LONG_RESP)
@@ -160,7 +160,7 @@ static int send_cmd(const int drive, struct mmc_command *cmd)
             }
         }
         else
-            if(status & MCI_CMDSENT)
+            if(status & MCI_CMD_SENT)
                 break;
 
     } while(1);
@@ -183,7 +183,7 @@ static void sd_init_card(const int drive)
     cmd_idle.cmd = GO_IDLE_STATE;
     cmd_idle.arg = 0;
     cmd_idle.flags = MMC_NO_FLAGS;
-    if(send_cmd(drive, &cmd_idle) != MCI_CMDSENT)
+    if(send_cmd(drive, &cmd_idle) != MCI_CMD_SENT)
         panicf("goto idle failed!");
 #ifdef DEBUG
     else
@@ -209,7 +209,7 @@ static void sd_init_card(const int drive)
 
     sdhc = false;
     status = send_cmd(drive, &cmd_if_cond);
-    if(status & (MCI_CMDCRCFAIL|MCI_CMDRESPEND))
+    if(status & (MCI_CMD_CRC_FAIL|MCI_CMD_RESP_END))
     {
         if((cmd_if_cond.resp[0] & 0xFFF) == cmd_if_cond.arg)
             sdhc = true;
@@ -240,7 +240,7 @@ static void sd_init_card(const int drive)
 #endif
         /* app_cmd */
         status = send_cmd(drive, &cmd_app);
-        if( !(status & (MCI_CMDCRCFAIL|MCI_CMDRESPEND)) ||
+        if( !(status & (MCI_CMD_CRC_FAIL|MCI_CMD_RESP_END)) ||
             !(cmd_app.resp[0] & (1<<5)) )
         {
             panicf("app_cmd failed");
@@ -248,7 +248,7 @@ static void sd_init_card(const int drive)
 
         cmd_op_cond.arg = sdhc ? 0x40FF8000 : (8<<0x14); /* ocr */
         status = send_cmd(drive, &cmd_op_cond);
-        if(!(status & (MCI_CMDCRCFAIL|MCI_CMDRESPEND)))
+        if(!(status & (MCI_CMD_CRC_FAIL|MCI_CMD_RESP_END)))
             panicf("cmd_op_cond failed");
 
 #ifdef DEBUG
@@ -268,16 +268,16 @@ static void init_pl180_controller(const int drive)
 
     MMC_MASK0(drive) = MMC_MASK1(drive) = 0;  /* disable all interrupts */
 
-    MMC_POWER(drive) = MCI_PWR_UP | (10 /*voltage*/ << 2); /* use OF voltage */
+    MMC_POWER(drive) = MCI_POWER_UP|(10 /*voltage*/ << 2); /* use OF voltage */
     mci_delay();
 
-    MMC_POWER(drive) |= MCI_PWR_ON;
+    MMC_POWER(drive) |= MCI_POWER_ON;
     mci_delay();
 
     MMC_SELECT(drive) = 0;
 
-    MMC_CLOCK(drive) = MCI_CLK_ENABLE;
-    MMC_CLOCK(drive) &= ~MCI_CLK_PWRSAVE;
+    MMC_CLOCK(drive) = MCI_CLOCK_ENABLE;
+    MMC_CLOCK(drive) &= ~MCI_CLOCK_POWERSAVE;
 
     /* set MCLK divider */
     mci_set_clock_divider(drive, 200);
diff --git a/firmware/target/arm/as3525/mmci.h b/firmware/target/arm/as3525/mmci.h
deleted file mode 100644
index 284eee0c75..0000000000
--- a/firmware/target/arm/as3525/mmci.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- *  linux/drivers/mmc/host/mmci.h - ARM PrimeCell MMCI PL180/1 driver
- *
- *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-//#define MMCIPOWER		0x000
-#define MCI_PWR_OFF		0x00
-#define MCI_PWR_UP		0x02
-#define MCI_PWR_ON		0x03
-#define MCI_OD			(1 << 6)
-#define MCI_ROD			(1 << 7)
-
-//#define MMCICLOCK		0x004
-#define MCI_CLK_ENABLE		(1 << 8)
-#define MCI_CLK_PWRSAVE		(1 << 9)
-#define MCI_CLK_BYPASS		(1 << 10)
-#define MCI_WIDEBUS         (1 << 11)
-
-//#define MMCIARGUMENT		0x008
-//#define MMCICOMMAND		0x00c
-#define MCI_CPSM_RESPONSE	(1 << 6)
-#define MCI_CPSM_LONGRSP	(1 << 7)
-#define MCI_CPSM_INTERRUPT	(1 << 8)
-#define MCI_CPSM_PENDING	(1 << 9)
-#define MCI_CPSM_ENABLE		(1 << 10)
-
-#if 0
-#define MMCIRESPCMD		0x010
-#define MMCIRESPONSE0		0x014
-#define MMCIRESPONSE1		0x018
-#define MMCIRESPONSE2		0x01c
-#define MMCIRESPONSE3		0x020
-#define MMCIDATATIMER		0x024
-#define MMCIDATALENGTH		0x028
-#define MMCIDATACTRL		0x02c
-#endif
-#define MCI_DPSM_ENABLE		(1 << 0)
-#define MCI_DPSM_DIRECTION	(1 << 1)
-#define MCI_DPSM_MODE		(1 << 2)
-#define MCI_DPSM_DMAENABLE	(1 << 3)
-
-//#define MMCIDATACNT		0x030
-//#define MMCISTATUS		0x034
-#define MCI_CMDCRCFAIL		(1 << 0)
-#define MCI_DATACRCFAIL		(1 << 1)
-#define MCI_CMDTIMEOUT		(1 << 2)
-#define MCI_DATATIMEOUT		(1 << 3)
-#define MCI_TXUNDERRUN		(1 << 4)
-#define MCI_RXOVERRUN		(1 << 5)
-#define MCI_CMDRESPEND		(1 << 6)
-#define MCI_CMDSENT		(1 << 7)
-#define MCI_DATAEND		(1 << 8)
-#define MCI_DATABLOCKEND	(1 << 10)
-#define MCI_CMDACTIVE		(1 << 11)
-#define MCI_TXACTIVE		(1 << 12)
-#define MCI_RXACTIVE		(1 << 13)
-#define MCI_TXFIFOHALFEMPTY	(1 << 14)
-#define MCI_RXFIFOHALFFULL	(1 << 15)
-#define MCI_TXFIFOFULL		(1 << 16)
-#define MCI_RXFIFOFULL		(1 << 17)
-#define MCI_TXFIFOEMPTY		(1 << 18)
-#define MCI_RXFIFOEMPTY		(1 << 19)
-#define MCI_TXDATAAVLBL		(1 << 20)
-#define MCI_RXDATAAVLBL		(1 << 21)
-
-//#define MMCICLEAR		0x038
-#define MCI_CMDCRCFAILCLR	(1 << 0)
-#define MCI_DATACRCFAILCLR	(1 << 1)
-#define MCI_CMDTIMEOUTCLR	(1 << 2)
-#define MCI_DATATIMEOUTCLR	(1 << 3)
-#define MCI_TXUNDERRUNCLR	(1 << 4)
-#define MCI_RXOVERRUNCLR	(1 << 5)
-#define MCI_CMDRESPENDCLR	(1 << 6)
-#define MCI_CMDSENTCLR		(1 << 7)
-#define MCI_DATAENDCLR		(1 << 8)
-#define MCI_DATABLOCKENDCLR	(1 << 10)
-
-//#define MMCIMASK0		0x03c
-#define MCI_CMDCRCFAILMASK	(1 << 0)
-#define MCI_DATACRCFAILMASK	(1 << 1)
-#define MCI_CMDTIMEOUTMASK	(1 << 2)
-#define MCI_DATATIMEOUTMASK	(1 << 3)
-#define MCI_TXUNDERRUNMASK	(1 << 4)
-#define MCI_RXOVERRUNMASK	(1 << 5)
-#define MCI_CMDRESPENDMASK	(1 << 6)
-#define MCI_CMDSENTMASK		(1 << 7)
-#define MCI_DATAENDMASK		(1 << 8)
-#define MCI_DATABLOCKENDMASK	(1 << 10)
-#define MCI_CMDACTIVEMASK	(1 << 11)
-#define MCI_TXACTIVEMASK	(1 << 12)
-#define MCI_RXACTIVEMASK	(1 << 13)
-#define MCI_TXFIFOHALFEMPTYMASK	(1 << 14)
-#define MCI_RXFIFOHALFFULLMASK	(1 << 15)
-#define MCI_TXFIFOFULLMASK	(1 << 16)
-#define MCI_RXFIFOFULLMASK	(1 << 17)
-#define MCI_TXFIFOEMPTYMASK	(1 << 18)
-#define MCI_RXFIFOEMPTYMASK	(1 << 19)
-#define MCI_TXDATAAVLBLMASK	(1 << 20)
-#define MCI_RXDATAAVLBLMASK	(1 << 21)
-
-#if 0
-#define MMCIMASK1		0x040
-#define MMCIFIFOCNT		0x048
-#define MMCIFIFO		0x080 /* to 0x0bc */
-#endif
-
-#define MCI_IRQENABLE	\
-	(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK|	\
-	MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK|	\
-	MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK)
-
-/*
- * The size of the FIFO in bytes.
- */
-#define MCI_FIFOSIZE	(16*4)
-
-#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)
-
-#define NR_SG		16