Bring back rolo for mi4-based targets (H10 and Sansa).

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13550 a1c6a512-1295-4272-9138-f99709370657

7 files changed, 143 insertions, 0 deletions

diff --git a/firmware/SOURCES b/firmware/SOURCES
index ad802dabcb..fdb457cbed 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -23,6 +23,9 @@ debug.c
 /* Common */
 common/atoi.c
 common/crc32.c
+#ifdef MI4_FORMAT
+common/crc32-mi4.c
+#endif
 common/ctype.c
 #ifndef SIMULATOR
 common/dir.c
diff --git a/firmware/common/crc32-mi4.c b/firmware/common/crc32-mi4.c
new file mode 100644
index 0000000000..8956364f10
--- /dev/null
+++ b/firmware/common/crc32-mi4.c
@@ -0,0 +1,93 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id: crc32.c 10464 2006-08-05 20:19:10Z miipekk $
+ *
+ * Copyright (C) 2007 Barry Wardell
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+/*
+ * We can't use the CRC32 implementation in the firmware library as it uses a
+ * different polynomial. The polynomial needed is 0xEDB88320L
+ *
+ * CRC32 implementation taken from:
+ *
+ * efone - Distributed internet phone system.
+ *
+ * (c) 1999,2000 Krzysztof Dabrowski
+ * (c) 1999,2000 ElysiuM deeZine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+/* based on implementation by Finn Yannick Jacobs */
+
+
+
+/* crc_tab[] -- this crcTable is being build by chksum_crc32GenTab().
+ *      so make sure, you call it before using the other
+ *      functions!
+ */
+static unsigned int crc_tab[256];
+
+/* chksum_crc() -- to a given block, this one calculates the
+ *              crc32-checksum until the length is
+ *              reached. the crc32-checksum will be
+ *              the result.
+ */
+unsigned int chksum_crc32 (unsigned char *block, unsigned int length)
+{
+   register unsigned long crc;
+   unsigned long i;
+
+   crc = 0;
+   for (i = 0; i < length; i++)
+   {
+      crc = ((crc >> 8) & 0x00FFFFFF) ^ crc_tab[(crc ^ *block++) & 0xFF];
+   }
+   return (crc);
+}
+
+/* chksum_crc32gentab() --      to a global crc_tab[256], this one will
+ *              calculate the crcTable for crc32-checksums.
+ *              it is generated to the polynom [..]
+ */
+
+void chksum_crc32gentab (void)
+{
+   unsigned long crc, poly;
+   int i, j;
+
+   poly = 0xEDB88320L;
+   for (i = 0; i < 256; i++)
+   {
+      crc = i;
+      for (j = 8; j > 0; j--)
+      {
+     if (crc & 1)
+     {
+        crc = (crc >> 1) ^ poly;
+     }
+     else
+     {
+        crc >>= 1;
+     }
+      }
+      crc_tab[i] = crc;
+   }
+}
diff --git a/firmware/export/config-e200.h b/firmware/export/config-e200.h
index 73ff2e69ba..9d4fb1ccef 100644
--- a/firmware/export/config-e200.h
+++ b/firmware/export/config-e200.h
@@ -136,6 +136,7 @@
 /* Define this if you have adjustable CPU frequency */
 /*#define HAVE_ADJUSTABLE_CPU_FREQ*/
 
+#define MI4_FORMAT
 #define BOOTFILE_EXT    "mi4"
 #define BOOTFILE        "rockbox." BOOTFILE_EXT
 #define OLD_BOOTFILE    "rockbox.e200"
diff --git a/firmware/export/config-h10.h b/firmware/export/config-h10.h
index a5d32ebeaa..b0617eb71e 100644
--- a/firmware/export/config-h10.h
+++ b/firmware/export/config-h10.h
@@ -158,6 +158,7 @@
 /* Define this if you have adjustable CPU frequency */
 /*#define HAVE_ADJUSTABLE_CPU_FREQ*/
 
+#define MI4_FORMAT
 #define BOOTFILE_EXT    "mi4"
 #define BOOTFILE        "rockbox." BOOTFILE_EXT
 #define OLD_BOOTFILE    "rockbox.h10"
diff --git a/firmware/export/config-h10_5gb.h b/firmware/export/config-h10_5gb.h
index 48d73173ce..37a1a47c7f 100644
--- a/firmware/export/config-h10_5gb.h
+++ b/firmware/export/config-h10_5gb.h
@@ -141,6 +141,7 @@
 /* Define this if you have adjustable CPU frequency */
 /*#define HAVE_ADJUSTABLE_CPU_FREQ*/
 
+#define MI4_FORMAT
 #define BOOTFILE_EXT    "mi4"
 #define BOOTFILE        "rockbox." BOOTFILE_EXT
 #define OLD_BOOTFILE    "rockbox.h10"
diff --git a/firmware/include/crc32-mi4.h b/firmware/include/crc32-mi4.h
new file mode 100644
index 0000000000..e7f3229d5b
--- /dev/null
+++ b/firmware/include/crc32-mi4.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id: crc32.h 10464 2006-08-05 20:19:10Z miipekk $
+ *
+ * Copyright (C) 2007 Barry Wardell
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _CRC32_MI4_H
+#define _CRC32_MI4_H
+
+unsigned int chksum_crc32 (unsigned char *block, unsigned int length);
+void chksum_crc32gentab (void);
+
+#endif
diff --git a/firmware/rolo.c b/firmware/rolo.c
index 0375a7ac82..0b8a4f28ba 100644
--- a/firmware/rolo.c
+++ b/firmware/rolo.c
@@ -30,6 +30,14 @@
 #include "string.h"
 #include "buffer.h"
 
+#ifdef MI4_FORMAT
+#include "crc32-mi4.h"
+#undef FIRMWARE_OFFSET_FILE_CRC
+#undef FIRMWARE_OFFSET_FILE_DATA
+#define FIRMWARE_OFFSET_FILE_CRC     0xC
+#define FIRMWARE_OFFSET_FILE_DATA    0x200
+#endif
+
 #if !defined(IRIVER_IFP7XX_SERIES) && \
     (CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440)
 /* FIX: this doesn't work on iFP, 3rd Gen ipods */
@@ -152,7 +160,9 @@ int rolo_load(const char* filename)
     int fd;
     long length;
 #if defined(CPU_COLDFIRE) || defined(CPU_PP)
+#if !defined(MI4_FORMAT)
     int i;
+#endif
     unsigned long checksum,file_checksum;
 #else
     long file_length;
@@ -189,8 +199,11 @@ int rolo_load(const char* filename)
         return -1;
     }
 
+#if !defined(MI4_FORMAT)
     /* Rockbox checksums are big-endian */
     file_checksum = betoh32(file_checksum);
+#endif
+
 #ifdef CPU_PP
     cpu_message = COP_REBOOT;
     COP_CTL = PROC_WAKE;
@@ -208,11 +221,17 @@ int rolo_load(const char* filename)
         return -1;
     }
 
+#ifdef MI4_FORMAT
+    /* Check CRC32 to see if we have a valid file */
+    chksum_crc32gentab();
+    checksum = chksum_crc32 (audiobuf, length);
+#else
     checksum = MODEL_NUMBER;
     
     for(i = 0;i < length;i++) {
         checksum += audiobuf[i];
     }
+#endif
 
     /* Verify checksum against file header */
     if (checksum != file_checksum) {