diff options
| author | Linus Nielsen Feltzing <linus@haxx.se> | 2002-04-20 22:42:00 +0000 |
|---|---|---|
| committer | Linus Nielsen Feltzing <linus@haxx.se> | 2002-04-20 22:42:00 +0000 |
| commit | 432ba31511bc1a00803657b4b4c60f27791608ba (patch) | |
| tree | 4f29d0c34c94f3029dd96ba3bc74de49e2785e4d /firmware | |
| parent | 8c1d94fb235d69c5a61798b9f62d6b6663e738bc (diff) | |
Changed DMA TCRx register names to DTCRx
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@155 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
| -rw-r--r-- | firmware/sh7034.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/firmware/sh7034.h b/firmware/sh7034.h index 25bfcfa4a4..5fca9f51fd 100644 --- a/firmware/sh7034.h +++ b/firmware/sh7034.h @@ -96,19 +96,19 @@ #define SAR0_ADDR 0x05FFFF40 #define DAR0_ADDR 0x05FFFF44 #define OR_ADDR 0x05FFFF48 -#define TCR0_ADDR 0x05FFFF4A +#define DTCR0_ADDR 0x05FFFF4A #define CHCR0_ADDR 0x05FFFF4E #define SAR1_ADDR 0x05FFFF50 #define DAR1_ADDR 0x05FFFF54 -#define TCR1_ADDR 0x05FFFF5A +#define DTCR1_ADDR 0x05FFFF5A #define CHCR1_ADDR 0x05FFFF5E #define SAR2_ADDR 0x05FFFF60 #define DAR2_ADDR 0x05FFFF64 -#define TCR2_ADDR 0x05FFFF6A +#define DTCR2_ADDR 0x05FFFF6A #define CHCR2_ADDR 0x05FFFF6E #define SAR3_ADDR 0x05FFFF70 #define DAR3_ADDR 0x05FFFF74 -#define TCR3_ADDR 0x05FFFF7A +#define DTCR3_ADDR 0x05FFFF7A #define CHCR3_ADDR 0x05FFFF7E #define IPRA_ADDR 0x05FFFF84 @@ -232,19 +232,19 @@ #define SAR0 (*((volatile unsigned long*)SAR0_ADDR)) #define DAR0 (*((volatile unsigned long*)DAR0_ADDR)) #define DMAOR (*((volatile unsigned long*)DMAOR_ADDR)) -#define TCR0 (*((volatile unsigned long*)TCR0_ADDR)) +#define DTCR0 (*((volatile unsigned long*)DTCR0_ADDR)) #define CHCR0 (*((volatile unsigned short*)CHCR0_ADDR)) #define SAR1 (*((volatile unsigned long*)SAR1_ADDR)) #define DAR1 (*((volatile unsigned long*)DAR1_ADDR)) -#define TCR1 (*((volatile unsigned long*)TCR1_ADDR)) +#define DTCR1 (*((volatile unsigned long*)DTCR1_ADDR)) #define CHCR1 (*((volatile unsigned short*)CHCR1_ADDR)) #define SAR2 (*((volatile unsigned long*)SAR2_ADDR)) #define DAR2 (*((volatile unsigned long*)DAR2_ADDR)) -#define TCR2 (*((volatile unsigned long*)TCR2_ADDR)) +#define DTCR2 (*((volatile unsigned long*)DTCR2_ADDR)) #define HCR2 (*((volatile unsigned short*)CHCR2_ADDR)) #define SAR3 (*((volatile unsigned long*)SAR3_ADDR)) #define DAR3 (*((volatile unsigned long*)DAR3_ADDR)) -#define TCR3 (*((volatile unsigned long*)TCR3_ADDR)) +#define DTCR3 (*((volatile unsigned long*)DTCR3_ADDR)) #define CHCR3 (*((volatile unsigned short*)CHCR3_ADDR)) #define IPRA (*((volatile unsigned short*)IPRA_ADDR)) |