diff options
author | Cástor Muñoz <cmvidal@gmail.com> | 2016-05-26 09:59:44 +0200 |
---|---|---|
committer | Cástor Muñoz <cmvidal@gmail.com> | 2016-05-28 15:48:02 +0200 |
commit | 28920ec5cc994dff19bec100a57de4557f72a7f5 (patch) | |
tree | d82da8b6d8bd8bb95e2e29f1e00acd99910f5cc0 /firmware | |
parent | 9e284c11b11a09adae8073a3347480c1d580e0cc (diff) |
iPod Classic: fix typos / cosmetic
Change-Id: Ic6552dea4b300032875097ef0b885a4ae059f4bc
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/target/arm/s5l8700/usb-nano2g-6g.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/debug-s5l8702.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/gpio-s5l8702.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/gpio-s5l8702.h | 18 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/ipod6g/piezo.h | 2 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c | 10 |
6 files changed, 21 insertions, 19 deletions
diff --git a/firmware/target/arm/s5l8700/usb-nano2g-6g.c b/firmware/target/arm/s5l8700/usb-nano2g-6g.c index 7d48a5cabd..6ae9f9b96b 100644 --- a/firmware/target/arm/s5l8700/usb-nano2g-6g.c +++ b/firmware/target/arm/s5l8700/usb-nano2g-6g.c @@ -87,7 +87,7 @@ void usb_init_device(void) usb_drv_exit(); } -#else /* !HAVE_STACK */ +#else /* !HAVE_USBSTACK */ void usb_enable(bool on) { (void)on; diff --git a/firmware/target/arm/s5l8702/debug-s5l8702.c b/firmware/target/arm/s5l8702/debug-s5l8702.c index 3faf9dfc99..a61a728d43 100644 --- a/firmware/target/arm/s5l8702/debug-s5l8702.c +++ b/firmware/target/arm/s5l8702/debug-s5l8702.c @@ -133,9 +133,9 @@ bool dbg_hw_info(void) _DEBUG_PRINTF("accessory present: %s", pmu_accessory_present() ? "true" : "false"); #endif - extern unsigned long i2c_rd_err, i2c_wr_err; line++; - _DEBUG_PRINTF("i2c rd/wr errors:: %lu/%lu", i2c_rd_err, i2c_wr_err); + extern unsigned long i2c_rd_err, i2c_wr_err; + _DEBUG_PRINTF("i2c rd/wr errors: %lu/%lu", i2c_rd_err, i2c_wr_err); } #ifdef UC870X_DEBUG else if(state==2) diff --git a/firmware/target/arm/s5l8702/gpio-s5l8702.c b/firmware/target/arm/s5l8702/gpio-s5l8702.c index 0f7a029fb6..60ac141a91 100644 --- a/firmware/target/arm/s5l8702/gpio-s5l8702.c +++ b/firmware/target/arm/s5l8702/gpio-s5l8702.c @@ -170,7 +170,7 @@ void eint_unregister(struct eint_handler *h) } /* ISR */ -void ICODE_ATTR eint_handler(int group) +static void ICODE_ATTR eint_handler(int group) { int i; uint32_t ints; @@ -195,7 +195,7 @@ void ICODE_ATTR eint_handler(int group) EIC_INTLEVEL(group) ^= bit; /* swap level */ if (h->isr) - h->isr(h); /* exec GPIO handler */ + h->isr(h); /* exec app handler */ } } } diff --git a/firmware/target/arm/s5l8702/gpio-s5l8702.h b/firmware/target/arm/s5l8702/gpio-s5l8702.h index 9259fb05ef..f775e86726 100644 --- a/firmware/target/arm/s5l8702/gpio-s5l8702.h +++ b/firmware/target/arm/s5l8702/gpio-s5l8702.h @@ -39,13 +39,13 @@ * bit 2: if unmasked, EINT6 is generated when USB cable * is plugged and/or(TBC) unplugged. * - * IC_GROUP0..6 are connected to EINT6..0 of the VIC. + * EIC_GROUP0..6 are connected to EINT6..0 of the VIC. */ #define EIC_N_GROUPS 7 /* get EIC group and bit for a given GPIO port */ -#define EIC_GROUP(n) (6 - (n >> 5)) -#define EIC_INDEX(n) ((0x18 - (n & 0x18)) | (n & 0x7)) +#define EIC_GROUP(n) (6 - ((n) >> 5)) +#define EIC_INDEX(n) ((0x18 - ((n) & 0x18)) | ((n) & 0x7)) /* SoC EINTs uses these 'gpio' numbers */ #define GPIO_EINT_USB 0xd8 @@ -74,19 +74,19 @@ struct eint_handler { void (*isr)(struct eint_handler*); }; +void eint_init(void); void eint_register(struct eint_handler *h); void eint_unregister(struct eint_handler *h); -void eint_init(void); +void gpio_preinit(void); void gpio_init(void); /* get/set configuration for GPIO groups (0..15) */ uint32_t gpio_group_get(int group); void gpio_group_set(int group, uint32_t mask, uint32_t cfg); -void gpio_preinit(void); - -/* This is very preliminary work in progress, ATM this region is called +/* + * This is very preliminary work in progress, ATM this region is called * system 'alive' because it seems there are similiarities when mixing * concepts from: * - s3c2440 datasheet (figure 7-12, Sleep mode) and @@ -145,8 +145,8 @@ void gpio_preinit(void); * ALVCOM_RUN_BIT starts/stops count on ALVTCNT, counter frequency * is SClk / ALVTDIV. When count reachs ALVTEND then ALVTSTAT[0] * and ALVUNK4[0] are set, optionally an interrupt is generated (see - * GPIO_IC below). Writing 1 to ALVTCOM_RST_BIT clears ALVSTAT[0] - * and ALVUNK4[0] and initializes ALVTCNT to zero. + * GPIO_EINT_ALIVE). Writing 1 to ALVTCOM_RST_BIT clears ALVSTAT[0] + * and ALVUNK4[0], and initializes ALVTCNT to zero. */ #define ALVTCOM (*((REG32_PTR_T)(SYSALV_BASE + 0x6c))) #define ALVTCOM_RUN_BIT (1 << 0) /* 0 -> Stop, 1 -> Start */ diff --git a/firmware/target/arm/s5l8702/ipod6g/piezo.h b/firmware/target/arm/s5l8702/ipod6g/piezo.h index 063b8231a6..7abe05ac65 100644 --- a/firmware/target/arm/s5l8702/ipod6g/piezo.h +++ b/firmware/target/arm/s5l8702/ipod6g/piezo.h @@ -28,6 +28,8 @@ bool piezo_busy(void); void piezo_button_beep(bool beep, bool force); #ifdef BOOTLOADER +#include <inttypes.h> +void piezo_tone(uint32_t period, int32_t duration); void piezo_seq(uint16_t *seq); #endif diff --git a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c index 3458e1918c..ef39a5cabb 100644 --- a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c +++ b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c @@ -46,7 +46,7 @@ #define CEATA_MMC_RCA 1 -/** static, private data **/ +/** static, private data **/ static uint8_t ceata_taskfile[16] STORAGE_ALIGN_ATTR; static uint16_t ata_identify_data[0x100] STORAGE_ALIGN_ATTR; static bool ceata; @@ -131,13 +131,13 @@ static int ata_wait_for_end_of_transfer(long timeout) if (dad & BIT(0)) RET_ERR(1); if ((dad & (BIT(3) | BITRANGE(5, 7))) == BIT(6)) return 0; RET_ERR(2); -} +} static int mmc_dsta_check_command_success(bool disable_crc) { int rc = 0; uint32_t dsta = SDCI_DSTA; - if (dsta & SDCI_DSTA_RESTOUTE) rc |= 1; + if (dsta & SDCI_DSTA_RESTOUTE) rc |= 1; if (dsta & SDCI_DSTA_RESENDE) rc |= 2; if (dsta & SDCI_DSTA_RESINDE) rc |= 4; if (!disable_crc) @@ -363,7 +363,7 @@ static int ceata_init(int buswidth) { uint32_t result; PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_SWITCH) | SDCI_CMD_RES_BUSY - | SDCI_CMD_CMD_TYPE_AC | SDCI_CMD_RES_TYPE_R1 + | SDCI_CMD_CMD_TYPE_AC | SDCI_CMD_RES_TYPE_R1 | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR, MMC_CMD_SWITCH_ACCESS_WRITE_BYTE | MMC_CMD_SWITCH_INDEX(MMC_CMD_SWITCH_FIELD_HS_TIMING) @@ -1093,7 +1093,7 @@ static int ata_num_drives(int first_drive) { /* We don't care which logical drive number(s) we have been assigned */ (void)first_drive; - + return 1; } #endif |