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authorJack Halpin <jack.halpin@gmail.com>2009-07-01 04:47:36 +0000
committerJack Halpin <jack.halpin@gmail.com>2009-07-01 04:47:36 +0000
commitc929310e55bf337e4a31675a30031a7818f5deda (patch)
treeaa1666730c904ecee62c480c9708f307767929d4 /firmware/target
parent4093874f80571f32e2aedd2b09b2be9eb5efc47c (diff)
AMSSansa: Corrects bug introduced with r21577 causing random lockups on AMSSansas.
The input to the ADC is now set to CVDD inside the while loop. If the input gets changed while waiting for the voltage to be read it will now be reset to CVDD before the next read is attempted. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21584 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/as3525/system-as3525.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index b77f3dee9b..828ed2ef3e 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -330,9 +330,10 @@ void set_cpu_frequency(long frequency)
{
/* Increasing frequency so boost voltage before change */
ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20));
- /* Confirm voltage is at least 1.20v before making fclk > 200 MHz */
- ascodec_write(AS3514_ADC_0, 4<<4); /* ADC Source = CVDD */
- while (ascodec_read(AS3514_ADC_1) < 0xe0); /* 0x1e0 *.0025 = 1.20 */
+ /* Wait for voltage to be at least 1.20v before making fclk > 200 MHz */
+ do
+ ascodec_write(AS3514_ADC_0, 4<<4); /* ADC Input = CVDD */
+ while (ascodec_read(AS3514_ADC_1) < 0xe0); /* 0x1e0 *.0025 = 1.20v */
/* e0 = 8LSB's of 0x1e0 */
asm volatile(
"mrc p15, 0, r0, c1, c0 \n"