More iAudio M3 work. Bootloader compiles, but doesn't work yet.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16645 a1c6a512-1295-4272-9138-f99709370657

8 files changed, 922 insertions, 0 deletions

diff --git a/firmware/target/coldfire/crt0.S b/firmware/target/coldfire/crt0.S
index 1f5a20a028..cb08dbb7db 100644
--- a/firmware/target/coldfire/crt0.S
+++ b/firmware/target/coldfire/crt0.S
@@ -61,6 +61,7 @@ start:
     move.l  #0x00000180,%d0 /* CSCR0 - no wait states, 16 bits, no bursts */
     move.l  %d0,(0x088,%a0)
         
+#ifndef IAUDIO_M3
     /* Chip select 1 - LCD controller */
     move.l  #0xf0000000,%d0 /* CSAR1 - Base = 0xf0000000 */
     move.l  %d0,(0x08c,%a0)
@@ -68,6 +69,7 @@ start:
     move.l  %d0,(0x090,%a0)
     move.l  #0x00000180,%d0 /* CSCR1 - no wait states, 16 bits, no bursts */
     move.l  %d0,(0x094,%a0)
+#endif
         
     /* Chip select 2 - ATA controller */
     move.l  #0x20000000,%d0 /* CSAR2 - Base = 0x20000000 */
diff --git a/firmware/target/coldfire/iaudio/m3/backlight-m3.c b/firmware/target/coldfire/iaudio/m3/backlight-m3.c
new file mode 100644
index 0000000000..b1b95a898e
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/backlight-m3.c
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Jens Arnold
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "cpu.h"
+#include "system.h"
+#include "backlight.h"
+#include "backlight-target.h"
+
+bool _backlight_init(void)
+{
+    and_l(~0x00000008, &GPIO1_OUT);
+    or_l(0x00000008, &GPIO1_ENABLE);
+    or_l(0x00000008, &GPIO1_FUNCTION);
+    return true; /* Backlight always ON after boot. */
+}
+
+void _backlight_on(void)
+{
+    and_l(~0x00000008, &GPIO1_OUT);
+}
+
+void _backlight_off(void)
+{
+    or_l(0x00000008, &GPIO1_OUT);
+}
diff --git a/firmware/target/coldfire/iaudio/m3/backlight-target.h b/firmware/target/coldfire/iaudio/m3/backlight-target.h
new file mode 100644
index 0000000000..88bd7f6d14
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/backlight-target.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Jens Arnold
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef BACKLIGHT_TARGET_H
+#define BACKLIGHT_TARGET_H
+
+bool _backlight_init(void);
+void _backlight_on(void);
+void _backlight_off(void);
+
+#endif
diff --git a/firmware/target/coldfire/iaudio/m3/button-m3.c b/firmware/target/coldfire/iaudio/m3/button-m3.c
new file mode 100644
index 0000000000..1a27af93f5
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/button-m3.c
@@ -0,0 +1,101 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Jens Arnold
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "system.h"
+#include "button.h"
+#include "backlight.h"
+#include "adc.h"
+
+static bool hold_button        = false;
+static bool remote_hold_button = false;
+
+void button_init_device(void)
+{
+    /* Remote Play */
+    GPIO_FUNCTION |= 0x80000000;
+    GPIO_ENABLE &= ~0x80000000;
+}
+
+bool button_hold(void)
+{
+    return (GPIO1_READ & 0x00000200) == 0;
+}
+
+bool remote_button_hold(void)
+{
+    return remote_hold_button;
+}
+
+int button_read_device(void)
+{
+    int  btn = BUTTON_NONE;
+    bool hold_button_old;
+    bool remote_hold_button_old;
+    int  data = 0xff; /* FIXME */
+
+    /* normal buttons */
+    hold_button_old = hold_button;
+    hold_button = button_hold();
+
+#ifndef BOOTLOADER
+    /* give BL notice if HB state chaged */
+    if (hold_button != hold_button_old)
+        backlight_hold_changed(hold_button);
+#endif
+
+    if (!hold_button)
+    {
+#if 0 /* TODO: implement ADC */
+        data = adc_scan(ADC_BUTTONS);
+
+        if (data < 0xf0)
+        {
+        }
+#endif
+        if (!(GPIO1_READ & 0x00000002))
+            btn |= BUTTON_PLAY;
+    }
+
+    /* remote buttons */
+#if 0 /* TODO: implement ADC */
+    data = remote_detect() ? adc_scan(ADC_REMOTE) : 0xff;
+#endif
+
+    remote_hold_button_old = remote_hold_button;
+    remote_hold_button = data < 0x17;
+
+#ifndef BOOTLOADER
+    if (remote_hold_button != remote_hold_button_old)
+        remote_backlight_hold_changed(remote_hold_button);
+#endif
+
+    if (!remote_hold_button)
+    {
+#if 0 /* TODO: implement ADC */
+        if (data < 0xee)
+        {
+        }
+#endif
+        if ((GPIO_READ & 0x80000000) == 0)
+            btn |= BUTTON_RC_PLAY;
+    }
+
+    return btn;
+}
diff --git a/firmware/target/coldfire/iaudio/m3/button-target.h b/firmware/target/coldfire/iaudio/m3/button-target.h
new file mode 100644
index 0000000000..d273766c31
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/button-target.h
@@ -0,0 +1,71 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Jens Arnold
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef _BUTTON_TARGET_H_
+#define _BUTTON_TARGET_H_
+
+#include <stdbool.h>
+#include "config.h"
+
+#define HAS_BUTTON_HOLD
+#define HAS_REMOTE_BUTTON_HOLD
+
+bool button_hold(void);
+bool remote_button_hold(void);
+void button_init_device(void);
+int button_read_device(void);
+
+/* iaudio M3 specific button codes */
+
+    /* Main unit's buttons */
+#define BUTTON_PLAY         0x00000001
+
+#define BUTTON_LEFT         0x00000002
+#define BUTTON_RIGHT        0x00000004
+#define BUTTON_VOL_UP       0x00000008
+#define BUTTON_VOL_DOWN     0x00000010
+
+#define BUTTON_MODE         0x00000020
+#define BUTTON_REC          0x00000040
+
+
+#define BUTTON_MAIN (BUTTON_PLAY|BUTTON_LEFT|BUTTON_RIGHT\
+                |BUTTON_VOL_UP|BUTTON_VOL_DOWN|BUTTON_MODE|BUTTON_REC)
+
+    /* Remote control's buttons */
+#define BUTTON_RC_PLAY      0x00100000
+
+#define BUTTON_RC_REW       0x00080000
+#define BUTTON_RC_FF        0x00040000
+#define BUTTON_RC_VOL_UP    0x00020000
+#define BUTTON_RC_VOL_DOWN  0x00010000
+
+#define BUTTON_RC_REC       0x00008000
+#define BUTTON_RC_MENU      0x00004000
+#define BUTTON_RC_MODE      0x00002000
+
+#define BUTTON_REMOTE (BUTTON_RC_PLAY|BUTTON_RC_VOL_UP|BUTTON_RC_VOL_DOWN\
+                |BUTTON_RC_REW|BUTTON_RC_FF\
+                |BUTTON_RC_REC|BUTTON_RC_MENU|BUTTON_RC_MODE)
+
+#define POWEROFF_BUTTON     BUTTON_PLAY
+#define RC_POWEROFF_BUTTON  BUTTON_RC_PLAY
+#define POWEROFF_COUNT      30
+
+#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/coldfire/iaudio/m3/lcd-m3.c b/firmware/target/coldfire/iaudio/m3/lcd-m3.c
new file mode 100644
index 0000000000..ac60006565
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/lcd-m3.c
@@ -0,0 +1,496 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2006 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "system.h"
+#include "file.h"
+#include "lcd.h"
+#include "scroll_engine.h"
+
+/* The LCD in the iAudio M3/M5/X5 remote control is a Tomato LSI 0350 */
+
+#define LCD_SET_DUTY_RATIO 0x48
+#define LCD_SELECT_ADC     0xa0
+#define LCD_SELECT_SHL     0xc0
+#define LCD_SET_COM0       0x44
+#define LCD_OSC_ON         0xab
+#define LCD_SELECT_DCDC    0x64
+#define LCD_SELECT_RES     0x20
+#define LCD_SET_VOLUME     0x81
+#define LCD_SET_BIAS       0x50
+#define LCD_CONTROL_POWER  0x28
+#define LCD_DISPLAY_ON     0xae
+#define LCD_SET_INITLINE   0x40
+#define LCD_SET_COLUMN     0x10
+#define LCD_SET_PAGE       0xb0
+#define LCD_SET_GRAY       0x88
+#define LCD_SET_PWM_FRC    0x90
+#define LCD_SET_POWER_SAVE 0xa8
+#define LCD_REVERSE        0xa6
+
+#define CS_LO      and_l(~0x00010000, &GPIO1_OUT)
+#define CS_HI      or_l(  0x00010000, &GPIO1_OUT)
+#define CLK_LO     and_l(~0x20000000, &GPIO_OUT)
+#define CLK_HI     or_l(  0x20000000, &GPIO_OUT)
+#define DATA_LO    and_l(~0x04000000, &GPIO_OUT)
+#define DATA_HI    or_l(  0x04000000, &GPIO_OUT)
+#define RS_LO      and_l(~0x00001000, &GPIO1_OUT)
+#define RS_HI      or_l(  0x00001000, &GPIO1_OUT)
+
+/* cached settings values */
+static bool cached_invert = false;
+static bool cached_flip = false;
+static int cached_contrast = DEFAULT_CONTRAST_SETTING;
+
+bool initialized = false;
+
+static void lcd_tick(void);
+
+/* Standard low-level byte writer. Requires CLK high on entry */
+static inline void _write_byte(unsigned data)
+{
+    asm volatile (
+        "move.l  (%[gpo0]), %%d0     \n"  /* Get current state of data line */
+        "and.l   %[dbit], %%d0       \n"
+        "beq.s   1f                  \n"  /*   and set it as previous-state bit */
+        "bset    #8, %[data]         \n"  
+    "1:                              \n"
+        "move.l  %[data], %%d0       \n"  /* Compute the 'bit derivative', i.e. a value */
+        "lsr.l   #1, %%d0            \n"  /*   with 1's where the data changes from the */
+        "eor.l   %%d0, %[data]       \n"  /*   previous state, and 0's where it doesn't */
+        "swap    %[data]             \n"  /* Shift data to upper byte */
+        "lsl.l   #8, %[data]         \n"
+        
+        "move.l  %[cbit], %%d1       \n"  /* Prepare mask for flipping CLK */
+        "or.l    %[dbit], %%d1       \n"  /*   and DATA at once */
+
+        "lsl.l   #1,%[data]          \n"  /* Shift out MSB */
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"  /* 1: Flip both CLK and DATA */
+        ".word   0x51fa              \n"  /* (trapf.w - shadow next insn) */
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"  /*   else flip CLK only */
+        "eor.l   %[cbit], (%[gpo0])  \n"  /* Flip CLK again */
+
+        "lsl.l   #1,%[data]          \n"  /* ..unrolled.. */
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %%d1, (%[gpo0])     \n"
+        ".word   0x51fa              \n"
+    "1:                              \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        "eor.l   %[cbit], (%[gpo0])  \n"
+        : /* outputs */
+        [data]"+d"(data)
+        : /* inputs */
+        [gpo0]"a"(&GPIO_OUT),
+        [cbit]"d"(0x20000000),
+        [dbit]"d"(0x04000000)
+        : /* clobbers */
+        "d0", "d1"
+    );
+}
+
+/* Fast low-level byte writer. Don't use with high CPU clock.
+ * Requires CLK high on entry */
+static inline void _write_fast(unsigned data)
+{
+    asm volatile (
+        "move.w  %%sr,%%d3           \n"  /* Get current interrupt level */
+        "move.w  #0x2700,%%sr        \n"  /* Disable interrupts */
+
+        "move.l  (%[gpo0]), %%d0     \n"  /* Get current state of data port */
+        "move.l  %%d0, %%d1          \n"
+        "and.l   %[dbit], %%d1       \n"  /* Check current state of data line */
+        "beq.s   1f                  \n"  /*   and set it as previous-state bit */
+        "bset    #8, %[data]         \n"
+    "1:                              \n"
+        "move.l  %[data], %%d1       \n"  /* Compute the 'bit derivative', i.e. a value */
+        "lsr.l   #1, %%d1            \n"  /*   with 1's where the data changes from the */
+        "eor.l   %%d1, %[data]       \n"  /*   previous state, and 0's where it doesn't */
+        "swap    %[data]             \n"  /* Shift data to upper byte */
+        "lsl.l   #8, %[data]         \n"
+        
+        "move.l  %%d0, %%d1          \n"  /* precalculate opposite state of clock line */
+        "eor.l   %[cbit], %%d1       \n"
+        
+        "lsl.l   #1,%[data]          \n"  /* Shift out MSB */
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"  /* 1: Flip data bit */
+        "eor.l   %[dbit], %%d1       \n"  /*   for both clock states */
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"  /* Output new state and set CLK */
+        "move.l  %%d0, (%[gpo0])     \n"  /* reset CLK */
+
+        "lsl.l   #1,%[data]          \n"  /* ..unrolled.. */
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "lsl.l   #1,%[data]          \n"
+        "bcc.s   1f                  \n"
+        "eor.l   %[dbit], %%d0       \n"
+        "eor.l   %[dbit], %%d1       \n"
+    "1:                              \n"
+        "move.l  %%d1, (%[gpo0])     \n"
+        "move.l  %%d0, (%[gpo0])     \n"
+
+        "move.w  %%d3, %%sr          \n" /* Restore interrupt level */
+        : /* outputs */
+        [data]"+d"(data)
+        : /* inputs */
+        [gpo0]"a"(&GPIO_OUT),
+        [cbit]"d"(0x20000000),
+        [dbit]"d"(0x04000000)
+        : /* clobbers */
+        "d0", "d1", "d2", "d3"
+    );
+}
+
+void lcd_write_command(int cmd)
+{
+    RS_LO;
+    CS_LO;
+    _write_byte(cmd);
+    CS_HI;
+}
+
+void lcd_write_command_e(int cmd, int data)
+{
+    RS_LO;
+    CS_LO;
+    _write_byte(cmd);
+    _write_byte(data);
+    CS_HI;
+}
+
+void lcd_write_data(const fb_data *p_words, int count)
+{
+    const unsigned char *p_bytes = (const unsigned char *)p_words;
+    const unsigned char *p_end = (const unsigned char *)(p_words + count);
+
+    RS_HI;
+    CS_LO;
+    if (cpu_frequency < 50000000)
+    {
+        while (p_bytes < p_end)
+            _write_fast(*p_bytes++);
+    }
+    else
+    {
+        while (p_bytes < p_end)
+            _write_byte(*p_bytes++);
+    }
+    CS_HI;
+}
+
+int lcd_default_contrast(void)
+{
+    return DEFAULT_CONTRAST_SETTING;
+}
+
+void lcdset_contrast(int val)
+{
+    if (val < 0)
+        val = 0;
+    else if (val > 63)
+        val = 63;
+
+    cached_contrast = val;
+    if (initialized)
+        lcd_write_command_e(LCD_SET_VOLUME, val);
+}
+
+bool remote_detect(void)
+{
+    return (GPIO_READ & 0x40000000) == 0;
+}
+
+void lcd_init_device(void)
+{
+    or_l(0x24000000, &GPIO_OUT);
+    or_l(0x24000000, &GPIO_ENABLE);
+    or_l(0x24000000, &GPIO_FUNCTION);
+    
+    or_l(0x00011000, &GPIO1_OUT);
+    or_l(0x00011000, &GPIO1_ENABLE);
+    or_l(0x00011000, &GPIO1_FUNCTION);
+
+    and_l(~0x40000000, &GPIO_OUT);
+    and_l(~0x40000000, &GPIO_ENABLE);
+    or_l(0x40000000, &GPIO_FUNCTION);
+
+    lcd_clear_display();
+    tick_add_task(lcd_tick);
+}
+
+void lcd_on(void)
+{
+    CS_HI;
+    CLK_HI;
+    sleep(10);
+    
+    lcd_write_command(LCD_SET_DUTY_RATIO);
+    lcd_write_command(0x70);  /* 1/128 */
+    
+    lcd_write_command(LCD_OSC_ON);
+    
+    lcd_write_command(LCD_SELECT_DCDC | 2); /* DC/DC 5xboost */
+    
+    lcd_write_command(LCD_SELECT_RES | 7); /* Regulator resistor: 7.2 */
+    
+    lcd_write_command(LCD_SET_BIAS | 6); /* 1/11 */
+    
+    lcd_write_command(LCD_CONTROL_POWER | 7); /* All circuits ON */
+    
+    sleep(30);
+    
+    lcd_write_command_e(LCD_SET_GRAY | 0, 0x00);
+    lcd_write_command_e(LCD_SET_GRAY | 1, 0x00);
+    lcd_write_command_e(LCD_SET_GRAY | 2, 0x0c);
+    lcd_write_command_e(LCD_SET_GRAY | 3, 0x00);
+    lcd_write_command_e(LCD_SET_GRAY | 4, 0xcc);
+    lcd_write_command_e(LCD_SET_GRAY | 5, 0x00);
+    lcd_write_command_e(LCD_SET_GRAY | 6, 0xcc);
+    lcd_write_command_e(LCD_SET_GRAY | 7, 0x0c);
+    
+    lcd_write_command(LCD_SET_PWM_FRC | 6); /* 4FRC + 12PWM */
+    
+    lcd_write_command(LCD_DISPLAY_ON | 1); /* display on */
+
+    initialized = true;
+
+    lcd_set_flip(cached_flip);
+    lcd_set_contrast(cached_contrast);
+    lcd_set_invert_display(cached_invert);
+}
+
+void lcd_off(void)
+{
+    initialized = false;
+    CS_HI;
+    RS_HI;
+}
+
+void lcd_poweroff(void)
+{
+    /* Set power save -> Power OFF (VDD - VSS) .. that's it */
+    if (initialized && remote_detect())
+        lcd_write_command(LCD_SET_POWER_SAVE | 1);
+}
+
+/* Monitor remote hotswap */
+static void lcd_tick(void)
+{
+    static bool last_status = false;
+    static int countdown = 0;
+    bool current_status;
+
+    current_status = remote_detect();
+
+    /* Only report when the status has changed */
+    if (current_status != last_status)
+    {
+        last_status = current_status;
+        countdown = current_status ? 20*HZ : 1;
+    }
+    else
+    {
+        /* Count down until it gets negative */
+        if (countdown >= 0)
+            countdown--;
+
+        if (current_status)
+        {
+            if (!(countdown % 48))
+            {
+                queue_broadcast(SYS_REMOTE_PLUGGED, 0);
+            }
+        }
+        else
+        {
+            if (countdown == 0)
+            {
+                queue_broadcast(SYS_REMOTE_UNPLUGGED, 0);
+            }
+        }
+    }
+}
+
+/* Update the display.
+   This must be called after all other LCD functions that change the display. */
+void lcd_update(void) ICODE_ATTR;
+void lcd_update(void)
+{
+    int y;
+    if(initialized) {
+        for(y = 0;y < LCD_FBHEIGHT;y++) {
+            /* Copy display bitmap to hardware.
+               The COM48-COM63 lines are not connected so we have to skip
+               them. Further, the column address doesn't wrap, so we
+               have to update one page at a time. */
+            lcd_write_command(LCD_SET_PAGE | (y>5?y+2:y));
+            lcd_write_command_e(LCD_SET_COLUMN | 0, 0);
+            lcd_write_data(lcd_framebuffer[y], LCD_WIDTH);
+        }
+    }
+}
+
+/* Update a fraction of the display. */
+void lcd_update_rect(int, int, int, int) ICODE_ATTR;
+void lcd_update_rect(int x, int y, int width, int height)
+{
+    if(initialized) {
+        int ymax;
+
+        /* The Y coordinates have to work on even 8 pixel rows */
+        ymax = (y + height-1) >> 3;
+        y >>= 3;
+
+        if(x + width > LCD_WIDTH)
+            width = LCD_WIDTH - x;
+        if (width <= 0)
+            return; /* nothing left to do, 0 is harmful to lcd_write_data() */
+        if(ymax >= LCD_FBHEIGHT)
+            ymax = LCD_FBHEIGHT-1;
+
+        /* Copy specified rectangle bitmap to hardware
+           COM48-COM63 are not connected, so we need to skip those */
+        for (; y <= ymax; y++) 
+        {
+            lcd_write_command(LCD_SET_PAGE | ((y > 5?y + 2:y) & 0xf));
+            lcd_write_command_e(LCD_SET_COLUMN | ((x >> 4) & 0xf), x & 0xf);
+
+            lcd_write_data(&lcd_framebuffer[y][x], width);
+        } 
+    }
+}
+
+void lcd_set_invert_display(bool yesno)
+{
+    cached_invert = yesno;
+    if(initialized)
+        lcd_write_command(LCD_REVERSE | yesno);
+}
+
+void lcd_set_flip(bool yesno)
+{
+    cached_flip = yesno;
+    if(initialized) {
+        if(yesno) {
+            lcd_write_command(LCD_SELECT_ADC | 0);
+            lcd_write_command(LCD_SELECT_SHL | 0);
+            lcd_write_command_e(LCD_SET_COM0, 16);
+        } else {
+            lcd_write_command(LCD_SELECT_ADC | 1);
+            lcd_write_command(LCD_SELECT_SHL | 8);
+            lcd_write_command_e(LCD_SET_COM0, 0);
+        }
+    }
+}
diff --git a/firmware/target/coldfire/iaudio/m3/power-m3.c b/firmware/target/coldfire/iaudio/m3/power-m3.c
new file mode 100644
index 0000000000..624e3b44a5
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/power-m3.c
@@ -0,0 +1,71 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 by Jens Arnold
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "cpu.h"
+#include <stdbool.h>
+#include "kernel.h"
+#include "system.h"
+#include "power.h"
+
+#ifndef SIMULATOR
+
+void power_init(void)
+{   
+    /* Set KEEPACT */
+    or_l(0x00040000, &GPIO_OUT); 
+    or_l(0x00040000, &GPIO_ENABLE);
+    or_l(0x00040000, &GPIO_FUNCTION);
+
+    /* Charger detect */
+    and_l(~0x00000020, &GPIO1_ENABLE);
+    or_l(0x00000020, &GPIO1_FUNCTION);
+}
+
+bool charger_inserted(void)
+{     
+    return (GPIO1_READ & 0x00000020) == 0;
+}
+
+void ide_power_enable(bool on)
+{
+    if (on)
+    {
+        or_l(0x00800000, &GPIO_OUT);
+    }
+    else
+    {
+        and_l(~0x00800000, &GPIO_OUT);
+    }
+}
+
+bool ide_powered(void)
+{
+    return false;
+}
+
+void power_off(void)
+{
+    lcd_poweroff();
+    set_irq_level(DISABLE_INTERRUPTS);
+    and_l(~0x00040000, &GPIO_OUT); /* Set KEEPACT low */
+    asm("halt");
+}
+
+#endif /* SIMULATOR */
diff --git a/firmware/target/coldfire/iaudio/m3/system-m3.c b/firmware/target/coldfire/iaudio/m3/system-m3.c
new file mode 100644
index 0000000000..bf15caa8e0
--- /dev/null
+++ b/firmware/target/coldfire/iaudio/m3/system-m3.c
@@ -0,0 +1,112 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2006 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "config.h"
+#include "cpu.h"
+#include "kernel.h"
+#include "system.h"
+#include "power.h"
+#include "timer.h"
+
+/* Settings for all possible clock frequencies (with properly working timers)
+ * NOTE: Some 5249 chips don't like having PLLDIV set to 0. We must avoid that!
+ *
+ *                    xxx_REFRESH_TIMER below
+ * system.h, CPUFREQ_xxx_MULT    |
+ *              |                |
+ *              V                V
+ *                   PLLCR &   Rftim.         IDECONFIG1/IDECONFIG2
+ * CPUCLK/Hz  MULT ~0x70400000  16MB  CSCR0   CS2Pre CS2Post CS2Wait
+ * -----------------------------------------------------------------
+ *  11289600    1   0x00800200    4   0x0180     1      1       0
+ *  22579200    2   0x0589e025   10   0x0180     1      1       0
+ *  33868800    3   0x0388e025   15   0x0180     1      1       0
+ *  45158400    4   0x0589e021   21   0x0580     1      1       0
+ *  56448000    5   0x0289e025   26   0x0580     2      1       0
+ *  67737600    6   0x0388e021   32   0x0980     2      1       0
+ *  79027200    7   0x038a6021   37   0x0980     2      1       0
+ *  90316800    8   0x038be021   43   0x0d80     2      1       0
+ * 101606400    9   0x01892025   48   0x0d80     2      1       0
+ * 112896000   10   0x0189e025   54   0x1180     3      1       0
+ * 124185600   11   0x018ae025   59   0x1180     3      1       1
+ */
+
+#define MAX_REFRESH_TIMER     59
+#define NORMAL_REFRESH_TIMER  21
+#define DEFAULT_REFRESH_TIMER 4
+
+#ifdef HAVE_ADJUSTABLE_CPU_FREQ
+void set_cpu_frequency (long) __attribute__ ((section (".icode")));
+void set_cpu_frequency(long frequency)
+#else
+void cf_set_cpu_frequency (long) __attribute__ ((section (".icode")));
+void cf_set_cpu_frequency(long frequency)
+#endif    
+{
+    switch(frequency)
+    {
+    case CPUFREQ_MAX:
+        DCR = (0x8200 | DEFAULT_REFRESH_TIMER);
+              /* Refresh timer for bypass frequency */
+        PLLCR &= ~1;  /* Bypass mode */
+        timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
+        PLLCR = 0x018ae025 | (PLLCR & 0x70400000);
+        CSCR0 = 0x00001180; /* Flash: 4 wait states */
+        while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
+                                            This may take up to 10ms! */
+        timers_adjust_prescale(CPUFREQ_MAX_MULT, true);
+        DCR = (0x8200 | MAX_REFRESH_TIMER);          /* Refresh timer */
+        cpu_frequency = CPUFREQ_MAX;
+        IDECONFIG1 = 0x100000 | (1 << 13) | (3 << 10);
+                   /* SBUFEN2 enable | CS2Post | CS2Pre */
+        IDECONFIG2 = 0x40000 | (1 << 8); /* TA enable + CS2wait */
+        break;
+
+    case CPUFREQ_NORMAL:
+        DCR = (DCR & ~0x01ff) | DEFAULT_REFRESH_TIMER;
+              /* Refresh timer for bypass frequency */
+        PLLCR &= ~1;  /* Bypass mode */
+        timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
+        PLLCR = 0x0589e021 | (PLLCR & 0x70400000);
+        CSCR0 = 0x00000580; /* Flash: 1 wait state */
+        while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
+                                            This may take up to 10ms! */
+        timers_adjust_prescale(CPUFREQ_NORMAL_MULT, true);
+        DCR = (0x8000 | NORMAL_REFRESH_TIMER);       /* Refresh timer */
+        cpu_frequency = CPUFREQ_NORMAL;
+        IDECONFIG1 = 0x100000 | (1 << 13) | (1 << 10);
+                    /* BUFEN2 enable | CS2Post | CS2Pre */
+        IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */
+        break;
+
+    default:
+        DCR = (DCR & ~0x01ff) | DEFAULT_REFRESH_TIMER;
+              /* Refresh timer for bypass frequency */
+        PLLCR &= ~1;  /* Bypass mode */
+        timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, true);
+        /* Power down PLL, but keep CRSEL and CLSEL */
+        PLLCR = 0x00800200 | (PLLCR & 0x70400000);
+        CSCR0 = 0x00000180; /* Flash: 0 wait states */
+        DCR = (0x8000 | DEFAULT_REFRESH_TIMER);       /* Refresh timer */
+        cpu_frequency = CPUFREQ_DEFAULT;
+        IDECONFIG1 = 0x100000 | (1 << 13) | (1 << 10);
+                    /* BUFEN2 enable | CS2Post | CS2Pre */
+        IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */
+        break;
+    }
+}