diff options
| author | Solomon Peachy <pizza@shaftnet.org> | 2018-10-09 11:36:24 -0400 |
|---|---|---|
| committer | Solomon Peachy <pizza@shaftnet.org> | 2018-10-09 11:37:43 -0400 |
| commit | 71abdf5d82f476eba1f57eeac02427d295ce9be3 (patch) | |
| tree | 6ec7855b1a23b163c840f26c76600a1ac3a7773b /firmware/target | |
| parent | 046cc497ad15222974201bef443109165973e3b9 (diff) | |
mips: jz4740: JZ4740 does not have a MSC clock source select.
Change-Id: Ic2af37d92bcb8b6b35684f113eb8e392fc2eb609
Diffstat (limited to 'firmware/target')
| -rw-r--r-- | firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c index f7754426b4..d2438655e2 100644 --- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c @@ -615,7 +615,7 @@ static inline void cpm_select_msc_clk(unsigned int rate) if (div == 0) div = 1; - REG_CPM_MSCCDR = MSCCDR_MCS | (div - 1); + REG_CPM_MSCCDR = (div - 1); } /* Set the MMC clock frequency */ |