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authorJack Halpin <jack.halpin@gmail.com>2009-12-17 19:17:53 +0000
committerJack Halpin <jack.halpin@gmail.com>2009-12-17 19:17:53 +0000
commit7bce743218324bd565ffcbe161cb04c90bc9e2e3 (patch)
tree3d22dea5bf979c3d9ca2273879a5bb11940413b3 /firmware/target/arm
parent54e163a5a43f24e8d0d76cf038e5eeb636f77c4f (diff)
Sansa AMS: Revert 4 bit widebus
For some reason 4 bit widebus is creating issues when writing to the .rockbox directory so revert 4 bit widebus and the revision to the write delay that was added as a fix. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24054 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/as3525/ata_sd_as3525.c33
1 files changed, 2 insertions, 31 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c
index 07ae44a962..6513750652 100644
--- a/firmware/target/arm/as3525/ata_sd_as3525.c
+++ b/firmware/target/arm/as3525/ata_sd_as3525.c
@@ -376,31 +376,6 @@ static int sd_init_card(const int drive)
return -10;
mci_delay();
-#ifndef BOOTLOADER
- /* Switch to to 4 bit widebus mode */
- if(sd_wait_for_state(drive, SD_TRAN) < 0)
- return -11;
- mci_delay();
- /* CMD55 */
- if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
- return -12;
- mci_delay();
- /* ACMD6 */
- if(!send_cmd(drive, SD_SET_BUS_WIDTH, 2, MCI_ARG, NULL))
- return -13;
- mci_delay();
- /* CMD55 */
- if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
- return -14;
- mci_delay();
- /* ACMD42 */
- if(!send_cmd(drive, SD_SET_CLR_CARD_DETECT, 0, MCI_ARG, NULL))
- return -15;
- mci_delay();
- /* Now that card is widebus make controller widebus also */
- MCI_CLOCK(drive) |= MCI_CLOCK_WIDEBUS;
-#endif
-
/*
* enable bank switching
* without issuing this command, we only have access to 1/4 of the blocks
@@ -775,17 +750,13 @@ static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
(drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
-#if defined(HAVE_MULTIDRIVE)
+
/*Small delay for writes prevents data crc failures at lower freqs*/
- if(!hs_card)
+ if((drive == SD_SLOT_AS3525) && !hs_card)
{
int write_delay = 125;
while(write_delay--);
}
-#else
- int write_delay = 125;
- while(write_delay--);
-#endif
}
else
dma_enable_channel(0, MCI_FIFO(drive), dma_buf,