diff options
author | Dave Chapman <dave@dchapman.com> | 2009-09-17 08:05:19 +0000 |
---|---|---|
committer | Dave Chapman <dave@dchapman.com> | 2009-09-17 08:05:19 +0000 |
commit | 43ec944e3c0c31a7b4bedbb371f1ce9c1c24a80d (patch) | |
tree | f63c1452752ff80ac06cd0c56f5b57b0cfde4ebd /firmware/target/arm | |
parent | d67c4d2f6ba5bde26ca6e121064d4da116e868c5 (diff) |
TIMERB is in a different location on the S5L8701
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22716 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/s5l8700/kernel-s5l8700.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/system-s5l8700.c | 14 |
2 files changed, 13 insertions, 3 deletions
diff --git a/firmware/target/arm/s5l8700/kernel-s5l8700.c b/firmware/target/arm/s5l8700/kernel-s5l8700.c index 6f131d93f8..21b73e466d 100644 --- a/firmware/target/arm/s5l8700/kernel-s5l8700.c +++ b/firmware/target/arm/s5l8700/kernel-s5l8700.c @@ -54,6 +54,6 @@ void tick_start(unsigned int interval_in_ms) TBCMD = (1 << 0); /* TB_EN */ /* enable timer interrupt */ - INTMSK |= (1 << 7); + INTMSK |= INTMSK_TIMERB; } diff --git a/firmware/target/arm/s5l8700/system-s5l8700.c b/firmware/target/arm/s5l8700/system-s5l8700.c index 48c50645e9..da1811dc11 100644 --- a/firmware/target/arm/s5l8700/system-s5l8700.c +++ b/firmware/target/arm/s5l8700/system-s5l8700.c @@ -66,7 +66,12 @@ default_interrupt(INT_ADC); static void (* const irqvector[])(void) = { - EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMERA,INT_WDT,INT_TIMERB, + EXT0,EXT1,EXT2,EINT_VBUS,EINTG, +#if CONFIG_CPU==S5L8701 + INT_TIMERB,INT_WDT,INT_TIMERA, +#else + INT_TIMERA,INT_WDT,INT_TIMERB, +#endif INT_TIMERC,INT_TIMERD,INT_DMA,INT_ALARM_RTC,INT_PRI_RTC,RESERVED1,INT_UART,INT_USB_HOST, INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_ECC,INT_CALM,INT_ATA,INT_UART0,INT_SPDIF_OUT, INT_SDCI,INT_LCD,INT_SPI,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC @@ -74,7 +79,12 @@ static void (* const irqvector[])(void) = static const char * const irqname[] = { - "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMERA","INT_WDT","INT_TIMERB", + "EXT0","EXT1","EXT2","EINT_VBUS","EINTG", +#if CONFIG_CPU==S5L8701 + "INT_TIMERB","INT_WDT","INT_TIMERA", +#else + "INT_TIMERA","INT_WDT","INT_TIMERB", +#endif "INT_TIMERC","INT_TIMERD","INT_DMA","INT_ALARM_RTC","INT_PRI_RTC","Reserved","INT_UART","INT_USB_HOST", "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_ECC","INT_CALM","INT_ATA","INT_UART0","INT_SPDIF_OUT", "INT_SDCI","INT_LCD","INT_SPI","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC" |