diff options
author | Dave Chapman <dave@dchapman.com> | 2007-05-15 16:00:06 +0000 |
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committer | Dave Chapman <dave@dchapman.com> | 2007-05-15 16:00:06 +0000 |
commit | 0030378f74918f2d4f92517a2b36c7a0b473cbb9 (patch) | |
tree | 62cf911dc0b6ec60551fcb328d92055f4225f3e2 /firmware/target/arm | |
parent | e22b33ec72abbcc71df30a38328311dd68a178c7 (diff) |
More gigabeat LCD cleanup and completely remove the use of DMA for lcd_update_rect() (this was accidentally disabled anyway by the previous commit). The DMA version of lcd_update_rect() managed 64fps, but the memcpy based implementation manages 264fps.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13393 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c | 36 |
1 files changed, 1 insertions, 35 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c index 3bb2801b02..17b0a6966e 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c @@ -14,7 +14,6 @@ #define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)]) -volatile bool use_dma_blit = false; static volatile bool lcd_on = true; volatile bool lcd_poweroff = false; /* @@ -89,40 +88,7 @@ void lcd_update_rect(int x, int y, int width, int height) sleep(200); return; } - if (use_dma_blit) - { - /* Wait for this controller to stop pending transfer */ - while((DSTAT1 & 0x000fffff)) - CLKCON |= (1 << 2); /* set IDLE bit */ - - /* Flush DCache */ - invalidate_dcache_range((void *)(((int) &lcd_framebuffer[0][0])+(y * sizeof(fb_data) * LCD_WIDTH)), (height * sizeof(fb_data) * LCD_WIDTH)); - - /* set DMA dest */ - DIDST1 = ((int) FRAME) + (y * sizeof(fb_data) * LCD_WIDTH); - - /* FRAME on AHB buf, increment */ - DIDSTC1 = 0; - /* Handshake on AHB, Burst transfer, Whole service, Don't reload, transfer 32-bits */ - DCON1 = ((1<<30) | (1<<28) | (1<<27) | (1<<22) | (2<<20)) | ((height * sizeof(fb_data) * LCD_WIDTH) >> 4); - - /* set DMA source */ - DISRC1 = ((int) &lcd_framebuffer[0][0]) + (y * sizeof(fb_data) * LCD_WIDTH) + 0x30000000; - /* memory is on AHB bus, increment addresses */ - DISRCC1 = 0x00; - - /* Activate the channel */ - DMASKTRIG1 = 0x2; - - /* Start DMA */ - DMASKTRIG1 |= 0x1; - - /* Wait for transfer to complete */ - while((DSTAT1 & 0x000fffff)) - CLKCON |= (1 << 2); /* set IDLE bit */ - } - else - memcpy(((char*)FRAME) + (y * sizeof(fb_data) * LCD_WIDTH), ((char *)&lcd_framebuffer) + (y * sizeof(fb_data) * LCD_WIDTH), ((height * sizeof(fb_data) * LCD_WIDTH))); + memcpy(((char*)FRAME) + (y * sizeof(fb_data) * LCD_WIDTH), ((char *)&lcd_framebuffer) + (y * sizeof(fb_data) * LCD_WIDTH), ((height * sizeof(fb_data) * LCD_WIDTH))); } |