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authorKarl Kurbjun <kkurbjun@gmail.com>2009-11-02 04:37:57 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2009-11-02 04:37:57 +0000
commit02385cb5b02ecd13ee63fb636a8ed65071407b01 (patch)
treeb8d1a58c7676ec0ff6d989f2b6990b6a7dea0a17 /firmware/target/arm/tms320dm320/mrobe-500
parent451f9d58f35a2372a119caa4d9ca56879d8aae4c (diff)
M:Robe 500/M66591 USB improvements: Interrupts now work, a bug in odd-length transfers has been fixed. Buffers that are not initially short aligned are also now supported. Enable USB HID mouse mode.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23483 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320/mrobe-500')
-rw-r--r--firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c38
1 files changed, 25 insertions, 13 deletions
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c
index 1fbc1ce60f..06a501179d 100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c
@@ -30,32 +30,44 @@
void usb_init_device(void) {
logf("mxx: SOC Init");
- /* The EMIF timing that is currently used may not be apropriate when the
- * device is boosted. The following values were used with sucess too:
+ /* The following EMIF timing values are from the OF:
* IO_EMIF_CS4CTRL1 = 0x66AB;
* IO_EMIF_CS4CTRL2 = 0x4220;
+ *
+ * These EMIF timing values are more agressive, but appear to work as long
+ * as USB_TRANS_BLOCK is defined in the USB driver:
+ * IO_EMIF_CS4CTRL1 = 0x2245;
+ * IO_EMIF_CS4CTRL2 = 0x4110;
+ *
+ * When USB_TRANS_BLOCK is not defined the USB driver does not work unless
+ * the values from the OF are used.
*/
+
IO_EMIF_CS4CTRL1 = 0x2245;
IO_EMIF_CS4CTRL2 = 0x4110;
- IO_GIO_DIR0 &= ~(1<<2);
- IO_GIO_INV0 &= ~(1<<2);
- IO_GIO_FSEL0 &= ~(0x03);
+ /* Setup the m66591 reset signal */
+ IO_GIO_DIR0 &= ~(1<<2); /* output */
+ IO_GIO_INV0 &= ~(1<<2); /* non-inverted */
+ IO_GIO_FSEL0 &= ~(0x03); /* normal pins */
+
+ /* Setup the m66591 interrupt signal */
+ IO_GIO_DIR0 |= 1<<3; /* input */
+ IO_GIO_INV0 &= ~(1<<3); /* non-inverted */
+ IO_GIO_IRQPORT |= 1<<3; /* enable EIRQ */
+
+ udelay(100);
/* Drive the reset pin low */
- IO_GIO_BITCLR0 = 1<<2;
+ IO_GIO_BITCLR0 = 1<<2;
/* Wait a bit */
- udelay(3);
+ udelay(100);
/* Release the reset (drive it high) */
- IO_GIO_BITSET0 = 1<<2;
-
- udelay(300);
+ IO_GIO_BITSET0 = 1<<2;
- IO_GIO_DIR0 |= 1<<3;
- IO_GIO_INV0 &= ~(1<<3);
- IO_GIO_IRQPORT |= 1<<3;
+ udelay(500);
/* Enable the MXX interrupt */
IO_INTC_EINT1 |= (1<<8); /* IRQ_GIO3 */