diff options
| author | Michael Sevakis <jethead71@rockbox.org> | 2007-05-11 08:09:49 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2007-05-11 08:09:49 +0000 |
| commit | d92e09556fdec3fbd65e153c6f41c31cb1e04c42 (patch) | |
| tree | 38ceff3ef5ea2664f408675533dfe7292cb9c8b5 /firmware/target/arm/system-pp502x.c | |
| parent | 198845fe91d09153c092df86e0337020eba79c87 (diff) | |
GPIO IRQ ready button driver for e200 series. Can't actually use them yet but their status is polled. Easy to switch over once that works. Cheapo acceleration added or else it would be too fast for selecting items. Too much scrolling might cause the PCM buffer to empty out - beware. )
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13371 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/system-pp502x.c')
| -rw-r--r-- | firmware/target/arm/system-pp502x.c | 30 |
1 files changed, 26 insertions, 4 deletions
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c index 1f1cdf47b6..72e3a9b361 100644 --- a/firmware/target/arm/system-pp502x.c +++ b/firmware/target/arm/system-pp502x.c @@ -56,12 +56,21 @@ void irq(void) /* TODO: this should really be in the target tree, but moving it there caused crt0.S not to find it while linking */ /* TODO: Even if it isn't in the target tree, this should be the default case */ +extern void button_int(void); +extern void clickwheel_int(void); + void irq(void) { - if(CURRENT_CORE == CPU) - { - if (CPU_INT_STAT & TIMER1_MASK) + if(CURRENT_CORE == CPU) { + if (CPU_INT_STAT & TIMER1_MASK) { +#ifdef SANSA_E200 + if (GPIOF_INT_STAT & 0xff) + button_int(); + if (GPIOH_INT_STAT & 0xc0) + clickwheel_int(); +#endif TIMER1(); + } else if (CPU_INT_STAT & TIMER2_MASK) TIMER2(); } else { @@ -222,7 +231,20 @@ void system_init(void) COP_INT_CLR = -1; CPU_INT_CLR = -1; INT_FORCED_CLR = -1; - + + GPIOA_INT_EN = 0; + GPIOB_INT_EN = 0; + GPIOC_INT_EN = 0; + GPIOD_INT_EN = 0; + GPIOE_INT_EN = 0; + GPIOF_INT_EN = 0; + GPIOG_INT_EN = 0; + GPIOH_INT_EN = 0; + GPIOI_INT_EN = 0; + GPIOJ_INT_EN = 0; + GPIOK_INT_EN = 0; + GPIOL_INT_EN = 0; + # if NUM_CORES > 1 && defined(HAVE_ADJUSTABLE_CPU_FREQ) spinlock_init(&boostctrl_mtx); # endif |