diff options
author | Marcoen Hirschberg <marcoen@gmail.com> | 2007-04-18 12:22:27 +0000 |
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committer | Marcoen Hirschberg <marcoen@gmail.com> | 2007-04-18 12:22:27 +0000 |
commit | f44f961812c059b69df19ac5bd828986ba10513f (patch) | |
tree | 9b19de69126ed041992f31a7c690db841a36af6f /firmware/target/arm/s3c2440/gigabeat-fx/system-target.h | |
parent | c3dcc87aa494934943769b70fd752af1271d196a (diff) |
move the Gigabeat from gigabeat/meg-fx to s3c2440/gigabeat-fx to avoid problems with possible ports in the future: Gigabeat S/V (i.mx31 based) and Kenwood HD20GA7/HD20GA9 (s3c2440 based)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13200 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/system-target.h')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/system-target.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h new file mode 100644 index 0000000000..215b5a4daa --- /dev/null +++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h @@ -0,0 +1,40 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2007 by Greg White + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef SYSTEM_TARGET_H +#define SYSTEM_TARGET_H + +#include "mmu-meg-fx.h" +#include "system-arm.h" + +#define CPUFREQ_DEFAULT 98784000 +#define CPUFREQ_NORMAL 98784000 +#define CPUFREQ_MAX 296352000 + +#define HAVE_INVALIDATE_ICACHE +static inline void invalidate_icache(void) +{ + clean_dcache(); + asm volatile( + "mov r0, #0 \n" + "mcr p15, 0, r0, c7, c5, 0 \n" + : : : "r0" + ); +} + +#endif /* SYSTEM_TARGET_H */ |