diff options
| author | Will Robertson <aliask@rockbox.org> | 2007-09-21 15:51:53 +0000 |
|---|---|---|
| committer | Will Robertson <aliask@rockbox.org> | 2007-09-21 15:51:53 +0000 |
| commit | 590501cfe404b5463adecc70628e5bc7c8f142a2 (patch) | |
| tree | 3b038f90c9c3bbef8cf0b84f5a4ea338f9599851 /firmware/target/arm/imx31/gigabeat-s/system-target.h | |
| parent | a26110c52dff9bc15d20146462d52d07f61bd238 (diff) | |
Merge the Gigabeat S branch back into trunk. Fingers crossed nothing breaks.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14805 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/system-target.h')
| -rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/system-target.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/system-target.h b/firmware/target/arm/imx31/gigabeat-s/system-target.h new file mode 100644 index 0000000000..b1803d01cb --- /dev/null +++ b/firmware/target/arm/imx31/gigabeat-s/system-target.h @@ -0,0 +1,61 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2007 by Greg White + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef SYSTEM_TARGET_H +#define SYSTEM_TARGET_H + +#include "mmu-imx31.h" +#include "system-arm.h" + +#define CPUFREQ_NORMAL 532000000 + +static inline void udelay(unsigned int usecs) +{ + volatile signed int stop = EPITCNT1 - usecs; + while (EPITCNT1 > stop); +} + + +#define HAVE_INVALIDATE_ICACHE +static inline void invalidate_icache(void) +{ +} + +struct ARM_REGS { + int r0; + int r1; + int r2; + int r3; + int r4; + int r5; + int r6; + int r7; + int r8; + int r9; + int r10; + int r11; + int r12; + int sp; + int lr; + int pc; + int cpsr; +} regs; + +inline void dumpregs(void); + +#endif /* SYSTEM_TARGET_H */ |