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authorMichael Sevakis <jethead71@rockbox.org>2010-05-04 10:07:53 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-05-04 10:07:53 +0000
commit931e06de64100e28031627964321da3fdb449378 (patch)
tree72a073d7ec3ede9554b394887d43d19fda6e8177 /firmware/target/arm/imx31/debug-imx31.c
parent7480afb3c59f4aebff262e1ce47395a3924ca994 (diff)
i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25800 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/debug-imx31.c')
-rw-r--r--firmware/target/arm/imx31/debug-imx31.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/imx31/debug-imx31.c b/firmware/target/arm/imx31/debug-imx31.c
index d854c9bc36..2c4f8b4023 100644
--- a/firmware/target/arm/imx31/debug-imx31.c
+++ b/firmware/target/arm/imx31/debug-imx31.c
@@ -213,7 +213,7 @@ bool __dbg_ports(void)
lcd_puts(0, line++, "PMIC Registers");
line++;
- mc13783_read_regset(pmic_regset, pmic_regs, ARRAYLEN(pmic_regs));
+ mc13783_read_regs(pmic_regset, pmic_regs, ARRAYLEN(pmic_regs));
for (i = 0; i < (int)ARRAYLEN(pmic_regs); i++)
{