Sansa Fuze+: initial commit (bootloader only, LCD basically working)

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29808 a1c6a512-1295-4272-9138-f99709370657

21 files changed, 1792 insertions, 0 deletions

diff --git a/firmware/target/arm/imx233/boot.lds b/firmware/target/arm/imx233/boot.lds
new file mode 100644
index 0000000000..39e570a03e
--- /dev/null
+++ b/firmware/target/arm/imx233/boot.lds
@@ -0,0 +1,71 @@
+#include "config.h"
+#include "cpu.h"
+
+ENTRY(start)
+OUTPUT_FORMAT(elf32-littlearm)
+OUTPUT_ARCH(arm)
+STARTUP(target/arm/imx233/crt0.o)
+
+MEMORY
+{
+    IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE
+    DRAM : ORIGIN = DRAM_ORIG, LENGTH = DRAM_SIZE - TTB_SIZE
+}
+
+SECTIONS
+{
+    .vectors 0 :
+    {
+        *(.vectors);
+        . = ALIGN(0x4);
+    } > IRAM
+
+    .itext :
+    {
+        *(.icode)
+        *(.init.text)
+        . = ALIGN(0x4);
+    } > IRAM
+
+    .idata :
+    {
+        *(.qharray)
+        *(.idata)
+        *(.irodata)
+        . = ALIGN(0x4);
+    } > IRAM
+
+    .ibss :
+    {
+        *(.ibss)
+    } > IRAM
+
+    .text :
+    {
+        *(.text*)
+    } > DRAM
+
+    .data :
+    {
+        *(.data*)
+        *(.rodata*)
+        _dataend = . ;
+    } > DRAM
+
+    .stack (NOLOAD) :
+    {
+        *(.stack)
+        _stackbegin = .;
+        stackbegin = .;
+        . += 0x2000;
+        _stackend = .;
+        stackend = .;
+    } > DRAM
+
+    .bss (NOLOAD) :
+    {
+        _edata = .;
+        *(.bss*);
+        _end = .;
+    } > DRAM
+}
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.c b/firmware/target/arm/imx233/clkctrl-imx233.c
new file mode 100644
index 0000000000..0b46a0e8db
--- /dev/null
+++ b/firmware/target/arm/imx233/clkctrl-imx233.c
@@ -0,0 +1,84 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright © 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "clkctrl-imx233.h"
+
+#define __CLK_CLKGATE   (1 << 31)
+#define __CLK_BUSY      (1 << 29)
+
+void imx233_enable_timrot_xtal_clk32k(bool enable)
+{
+    if(enable)
+        __REG_CLR(HW_CLKCTRL_XTAL) = HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE;
+    else
+        __REG_SET(HW_CLKCTRL_XTAL) = HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE;
+}
+
+void imx233_enable_clock(enum imx233_clock_t clk, bool enable)
+{
+    volatile uint32_t *REG;
+    switch(clk)
+    {
+        case CLK_PIX: REG = &HW_CLKCTRL_PIX; break;
+        default: return;
+    }
+
+    /* warning: some registers like HW_CLKCTRL_PIX don't have a CLR/SET variant ! */
+    if(enable)
+    {
+        *REG = (*REG) & ~__CLK_CLKGATE;
+        while((*REG) & __CLK_CLKGATE);
+        while((*REG) & __CLK_BUSY);
+    }
+    else
+    {
+        *REG |= __CLK_CLKGATE;
+        while(!((*REG) & __CLK_CLKGATE));
+    }
+}
+
+void imx233_set_clock_divisor(enum imx233_clock_t clk, int div)
+{
+    switch(clk)
+    {
+        case CLK_PIX:
+            __REG_CLR(HW_CLKCTRL_PIX) = (1 << 12) - 1;
+            __REG_SET(HW_CLKCTRL_PIX) = div;
+            while(HW_CLKCTRL_PIX & __CLK_BUSY);
+            break;
+        default: return;
+    }
+}
+
+void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass)
+{
+    uint32_t msk;
+    switch(clk)
+    {
+        case CLK_PIX: msk = HW_CLKCTRL_CLKSEQ__BYPASS_PIX; break;
+        default: return;
+    }
+
+    if(bypass)
+        __REG_SET(HW_CLKCTRL_CLKSEQ) = msk;
+    else
+        __REG_CLR(HW_CLKCTRL_CLKSEQ) = msk;
+}
+
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.h b/firmware/target/arm/imx233/clkctrl-imx233.h
new file mode 100644
index 0000000000..ffc15c1043
--- /dev/null
+++ b/firmware/target/arm/imx233/clkctrl-imx233.h
@@ -0,0 +1,52 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright © 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef CLKCTRL_IMX233_H
+#define CLKCTRL_IMX233_H
+
+#include "config.h"
+#include "system.h"
+#include "cpu.h"
+
+#define HW_CLKCTRL_BASE     0x80040000
+
+#define HW_CLKCTRL_XTAL     (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x50))
+#define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26)
+
+#define HW_CLKCTRL_PIX      (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x60))
+
+#define HW_CLKCTRL_CLKSEQ   (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x110))
+#define HW_CLKCTRL_CLKSEQ__BYPASS_PIX   (1 << 1)
+
+#define HW_CLKCTRL_RESET    (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x120))
+#define HW_CLKCTRL_RESET_CHIP   0x2
+#define HW_CLKCTRL_RESET_DIG    0x1
+
+enum imx233_clock_t
+{
+    CLK_PIX,
+};
+
+void imx233_enable_timrot_xtal_clk32k(bool enable);
+void imx233_enable_clock(enum imx233_clock_t clk, bool enable);
+void imx233_set_clock_divisor(enum imx233_clock_t clk, int div);
+void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass);
+
+#endif /* CLKCTRL_IMX233_H */
diff --git a/firmware/target/arm/imx233/clock-target.h b/firmware/target/arm/imx233/clock-target.h
new file mode 100644
index 0000000000..59f684f16c
--- /dev/null
+++ b/firmware/target/arm/imx233/clock-target.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright © 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef CLOCK_TARGET_H
+#define CLOCK_TARGET_H
+
+#include "config.h"
+#include "cpu.h"
+
+#endif /* CLOCK_TARGET_H */
diff --git a/firmware/target/arm/imx233/crt0.S b/firmware/target/arm/imx233/crt0.S
new file mode 100644
index 0000000000..836c3e88cb
--- /dev/null
+++ b/firmware/target/arm/imx233/crt0.S
@@ -0,0 +1,117 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "config.h"
+#include "cpu.h"
+
+.section .vectors,"ax",%progbits
+.code 32
+.global start
+start:
+    /* most handlers are in DRAM which is too far away for a relative jump */
+    ldr     pc, =newstart
+    ldr     pc, =undef_instr_handler
+    ldr     pc, =software_int_handler
+    ldr     pc, =prefetch_abort_handler
+    ldr     pc, =data_abort_handler
+    ldr     pc, =reserved_handler
+    ldr     pc, =irq_handler
+    ldr     pc, =fiq_handler
+
+.text
+newstart:
+    msr     cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
+    /* Set up some stack and munge it with 0xdeadbeef */
+    ldr     sp, =stackend
+    ldr     r2, =stackbegin
+    ldr     r3, =0xdeadbeef
+1:
+    cmp     sp, r2
+    strhi   r3, [r2], #4
+    bhi     1b
+    
+    /* Set up stack for IRQ mode */ 
+    msr     cpsr_c, #0xd2
+    ldr     sp, =irq_stack
+
+    /* Set up stack for FIQ mode */ 
+    msr     cpsr_c, #0xd1
+    ldr     sp, =fiq_stack
+
+    /* Let abort and undefined modes use IRQ stack */
+    msr     cpsr_c, #0xd7
+    ldr     sp, =irq_stack
+    msr     cpsr_c, #0xdb
+    ldr     sp, =irq_stack
+
+    /* Switch back to supervisor mode */
+    msr     cpsr_c, #0xd3
+
+    /* Disable MMU, disable caching and buffering;
+     * use low exception range address (the core uses high range by default) */
+    mrc     p15, 0, r0, c1, c0, 0
+    ldr     r1, =0x3005
+    bic     r0, r1
+    mcr     p15, 0, r0, c1, c0, 0
+
+    /* Jump to main */
+    bl      main
+1:
+    b       1b
+
+/* All illegal exceptions call into UIE with exception address as first
+ * parameter. This is calculated differently depending on which exception
+ * we're in. Second parameter is exception number, used for a string lookup
+ * in UIE. */
+undef_instr_handler:
+    sub    r0, lr, #4   @ r0 points to the faulty ARM instruction
+#ifdef USE_THUMB
+    mrs    r1, spsr
+    tst    r1, #(1<<5)  @ T bit set ?
+    subne  r0, lr, #2   @ if yes, r0 points to the faulty THUMB instruction
+#endif /* USE_THUMB */
+    mov    r1, #0
+    b      UIE
+
+/* We run supervisor mode most of the time, and should never see a software
+ * exception being thrown. Perhaps make it illegal and call UIE? */
+software_int_handler:
+reserved_handler:
+    movs   pc, lr
+
+prefetch_abort_handler:
+    sub    r0, lr, #4
+    mov    r1, #1
+    b      UIE
+
+data_abort_handler:
+    sub    r0, lr, #8 
+    mov    r1, #2
+    b      UIE
+
+/* 256 words of IRQ stack */
+    .space 256*4
+irq_stack:
+
+/* 256 words of FIQ stack */
+    .space 256*4
+fiq_stack:
+
+end:
diff --git a/firmware/target/arm/imx233/kernel-imx233.c b/firmware/target/arm/imx233/kernel-imx233.c
new file mode 100644
index 0000000000..367f359dc0
--- /dev/null
+++ b/firmware/target/arm/imx233/kernel-imx233.c
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "kernel.h"
+#include "timrot-imx233.h"
+#include "clkctrl-imx233.h"
+
+static void tick_timer(void)
+{
+    /* Run through the list of tick tasks */
+    call_tick_tasks();
+}
+
+void tick_start(unsigned int interval_in_ms)
+{
+    /* use the 1-kHz XTAL clock source */
+    imx233_setup_timer(0, true, interval_in_ms,
+        HW_TIMROT_TIMCTRL__SELECT_1KHZ_XTAL, HW_TIMROT_TIMCTRL__PRESCALE_1,
+        false, &tick_timer);
+}
diff --git a/firmware/target/arm/imx233/lcdif-imx233.c b/firmware/target/arm/imx233/lcdif-imx233.c
new file mode 100644
index 0000000000..0b96cbf2bc
--- /dev/null
+++ b/firmware/target/arm/imx233/lcdif-imx233.c
@@ -0,0 +1,171 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (c) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "lcdif-imx233.h"
+
+static unsigned lcdif_word_length = 0;
+static unsigned lcdif_byte_packing = 0;
+
+void imx233_lcdif_enable_bus_master(bool enable)
+{
+    if(enable)
+        __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__LCDIF_MASTER;
+    else
+        __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__LCDIF_MASTER;
+}
+
+void imx233_lcdif_enable(bool enable)
+{
+    if(enable)
+        __REG_CLR(HW_LCDIF_CTRL) = __BLOCK_CLKGATE;
+    else
+        __REG_SET(HW_LCDIF_CTRL) = __BLOCK_CLKGATE;
+}
+
+void imx233_lcdif_reset(void)
+{
+    //imx233_reset_block(&HW_LCDIF_CTRL);// doesn't work
+    while(HW_LCDIF_CTRL & __BLOCK_CLKGATE)
+        HW_LCDIF_CTRL &= ~__BLOCK_CLKGATE;
+    while(!(HW_LCDIF_CTRL & __BLOCK_SFTRST))
+        HW_LCDIF_CTRL |= __BLOCK_SFTRST;
+    while(HW_LCDIF_CTRL & __BLOCK_CLKGATE)
+        HW_LCDIF_CTRL &= ~__BLOCK_CLKGATE;
+    while(HW_LCDIF_CTRL & __BLOCK_SFTRST)
+        HW_LCDIF_CTRL &= ~__BLOCK_SFTRST;
+    while(HW_LCDIF_CTRL & __BLOCK_CLKGATE)
+        HW_LCDIF_CTRL &= ~__BLOCK_CLKGATE;
+    __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
+}
+
+void imx233_lcdif_set_timings(unsigned data_setup, unsigned data_hold,
+    unsigned cmd_setup, unsigned cmd_hold)
+{
+    HW_LCDIF_TIMING = (data_setup << HW_LCDIF_TIMING__DATA_SETUP_BP) |
+        (data_hold << HW_LCDIF_TIMING__DATA_HOLD_BP) |
+        (cmd_setup << HW_LCDIF_TIMING__CMD_SETUP_BP) |
+        (cmd_hold << HW_LCDIF_TIMING__CMD_HOLD_BP);
+}
+
+void imx233_lcdif_set_lcd_databus_width(unsigned width)
+{
+    __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_BM;
+    __REG_SET(HW_LCDIF_CTRL) = width;
+}
+
+void imx233_lcdif_set_word_length(unsigned word_length)
+{
+    __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__WORD_LENGTH_BM;
+    __REG_SET(HW_LCDIF_CTRL) = word_length;
+    lcdif_word_length = word_length;
+}
+
+unsigned imx233_lcdif_enable_irqs(unsigned irq_bm)
+{
+    unsigned old_msk = (HW_LCDIF_CTRL1 & HW_LCDIF_CTRL1__IRQ_EN_BM) >>HW_LCDIF_CTRL1__IRQ_EN_BP ;
+    /* clear irq status */
+    __REG_CLR(HW_LCDIF_CTRL1) = irq_bm << HW_LCDIF_CTRL1__IRQ_BP;
+    /* disable irqs */
+    __REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__IRQ_EN_BM;
+    /* enable irqs */
+    __REG_SET(HW_LCDIF_CTRL1) = irq_bm << HW_LCDIF_CTRL1__IRQ_EN_BP;
+
+    return old_msk;
+}
+
+void imx233_lcdif_set_byte_packing_format(unsigned byte_packing)
+{
+    __REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BM;
+    __REG_SET(HW_LCDIF_CTRL1) = byte_packing << HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BP;
+    lcdif_byte_packing = byte_packing;
+}
+
+void imx233_lcdif_set_data_format(bool data_fmt_16, bool data_fmt_18, bool data_fmt_24)
+{
+    if(data_fmt_16)
+        __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_FORMAT_16_BIT;
+    else
+        __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_FORMAT_16_BIT;
+    if(data_fmt_18)
+        __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_FORMAT_18_BIT;
+    else
+        __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_FORMAT_18_BIT;
+    if(data_fmt_24)
+        __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_FORMAT_24_BIT;
+    else
+        __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_FORMAT_24_BIT;
+}
+
+void imx233_lcdif_wait_ready(void)
+{
+    while(HW_LCDIF_CTRL & HW_LCDIF_CTRL__RUN);
+}
+
+void imx233_lcdif_pio_send(bool data_mode, unsigned len, uint32_t *buf)
+{
+    unsigned max_xfer_size = 0xffff;
+    if(len == 0)
+        return;
+    if(lcdif_word_length == HW_LCDIF_CTRL__WORD_LENGTH_16_BIT)
+        max_xfer_size = 0x1fffe;
+    imx233_lcdif_wait_ready();
+    unsigned msk = imx233_lcdif_enable_irqs(0);
+    imx233_lcdif_enable_bus_master(false);
+
+    do
+    {
+        unsigned burst = MIN(len, max_xfer_size);
+        len -= burst;
+        unsigned count = burst;
+        if(lcdif_word_length != HW_LCDIF_CTRL__WORD_LENGTH_8_BIT)
+        {
+            if(burst & 1)
+                burst++;
+            count = burst / 2;
+        }
+        else
+            count = burst;
+        HW_LCDIF_TRANSFER_COUNT = 0;
+        HW_LCDIF_TRANSFER_COUNT = 0x10000 | count;
+        __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_SELECT | HW_LCDIF_CTRL__RUN;
+        if(data_mode)
+            __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_SELECT;
+        __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__RUN;
+        burst = (burst + 3) / 4;
+        while(burst-- > 0)
+        {
+            while(HW_LCDIF_STAT & HW_LCDIF_STAT__LFIFO_FULL);
+            HW_LCDIF_DATA = *buf++;
+        }
+        while(HW_LCDIF_CTRL & HW_LCDIF_CTRL__RUN);
+    }while(len > 0);
+    imx233_lcdif_enable_bus_master(true);
+    imx233_lcdif_enable_irqs(msk);
+}
+
+void imx233_lcdif_dma_send(void *buf, unsigned width, unsigned height)
+{
+    HW_LCDIF_CUR_BUF = (uint32_t)buf;
+    HW_LCDIF_TRANSFER_COUNT = 0;
+    HW_LCDIF_TRANSFER_COUNT = (height << 16) | width;
+    __REG_CLR(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__RUN;
+    __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__DATA_SELECT;
+    __REG_SET(HW_LCDIF_CTRL) = HW_LCDIF_CTRL__RUN;
+}
diff --git a/firmware/target/arm/imx233/lcdif-imx233.h b/firmware/target/arm/imx233/lcdif-imx233.h
new file mode 100644
index 0000000000..970b8661e5
--- /dev/null
+++ b/firmware/target/arm/imx233/lcdif-imx233.h
@@ -0,0 +1,100 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (c) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __LCDIF_IMX233_H__
+#define __LCDIF_IMX233_H__
+
+#include <string.h>
+#include "cpu.h"
+#include "system.h"
+#include "system-target.h"
+
+#define HW_LCDIF_BASE           0x80030000
+
+#define HW_LCDIF_CTRL           (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x0))
+#define HW_LCDIF_CTRL__WORD_LENGTH_16_BIT   (0 << 8)
+#define HW_LCDIF_CTRL__WORD_LENGTH_8_BIT    (1 << 8)
+#define HW_LCDIF_CTRL__WORD_LENGTH_18_BIT   (2 << 8)
+#define HW_LCDIF_CTRL__WORD_LENGTH_24_BIT   (3 << 8)
+#define HW_LCDIF_CTRL__WORD_LENGTH_BM       (3 << 8)
+#define HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_18_BIT (2 << 10)
+#define HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_BM (3 << 10)
+#define HW_LCDIF_CTRL__LCDIF_MASTER         (1 << 5)
+#define HW_LCDIF_CTRL__DATA_FORMAT_16_BIT   (1 << 3)
+#define HW_LCDIF_CTRL__DATA_FORMAT_18_BIT   (1 << 2)
+#define HW_LCDIF_CTRL__DATA_FORMAT_24_BIT   (1 << 1)
+#define HW_LCDIF_CTRL__RUN                  0x1
+#define HW_LCDIF_CTRL__DATA_SELECT          (1 << 16)
+
+#define HW_LCDIF_CTRL1          (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x10))
+#define HW_LCDIF_CTRL1__RESET           1
+#define HW_LCDIF_CTRL1__BUSY_ENABLE     (1 << 2)
+#define HW_LCDIF_CTRL1__MODE86          (1 << 1)
+#define HW_LCDIF_CTRL1__IRQ_EN_BP       12
+#define HW_LCDIF_CTRL1__IRQ_EN_BM       (0xf << 12)
+#define HW_LCDIF_CTRL1__IRQ_BP          8
+#define HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BM  (0xf << 16)
+#define HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BP  16
+
+#define HW_LCDIF__VSYNC_EDGE_IRQ        1
+#define HW_LCDIF__CUR_FRAME_DONE_IRQ    2
+#define HW_LCDIF__UNDERFLOW_IRQ         4
+#define HW_LCDIF__OVERFLOW_IRQ          8
+
+#define HW_LCDIF_TRANSFER_COUNT (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x20))
+#define HW_LCDIF_CUR_BUF        (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x30))
+#define HW_LCDIF_NEXT_BUF       (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x40))
+#define HW_LCDIF_TIMING         (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x60))
+#define HW_LCDIF_TIMING__DATA_SETUP_BP  0
+#define HW_LCDIF_TIMING__DATA_HOLD_BP   8
+#define HW_LCDIF_TIMING__CMD_SETUP_BP   16
+#define HW_LCDIF_TIMING__CMD_HOLD_BP    24
+
+#define HW_LCDIF_CSC_COEFF0     (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x110))
+#define HW_LCDIF_CSC_COEFF1     (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x120))
+#define HW_LCDIF_CSC_COEFF2     (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x130))
+#define HW_LCDIF_CSC_COEFF3     (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x140))
+#define HW_LCDIF_CSC_COEFF4     (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x150))
+#define HW_LCDIF_CSC_OFFSET     (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x160))
+#define HW_LCDIF_CSC_LIMIT      (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x170))
+#define HW_LCDIF_DATA           (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x1b0))
+
+#define HW_LCDIF_STAT           (*(volatile uint32_t *)(HW_LCDIF_BASE + 0x1d0))
+#define HW_LCDIF_STAT__LFIFO_FULL   (1 << 29)
+#define HW_LCDIF_STAT__LFIFO_EMPTY  (1 << 28)
+#define HW_LCDIF_STAT__TXFIFO_FULL  (1 << 27)
+#define HW_LCDIF_STAT__TXFIFO_EMPTY (1 << 26)
+#define HW_LCDIF_STAT__BUSY         (1 << 25)
+
+void imx233_lcdif_enable_bus_master(bool enable);
+void imx233_lcdif_enable(bool enable);
+void imx233_lcdif_reset(void);
+void imx233_lcdif_set_timings(unsigned data_setup, unsigned data_hold,
+    unsigned cmd_setup, unsigned cmd_hold);
+void imx233_lcdif_set_lcd_databus_width(unsigned width);
+void imx233_lcdif_set_word_length(unsigned word_length);
+void imx233_lcdif_set_byte_packing_format(unsigned byte_packing);
+void imx233_lcdif_set_data_format(bool data_fmt_16, bool data_fmt_18, bool data_fmt_24);
+unsigned imx233_lcdif_enable_irqs(unsigned irq_bm); /* return old mask */
+void imx233_lcdif_wait_ready(void);
+void imx233_lcdif_pio_send(bool data_mode, unsigned len, uint32_t *buf);
+void imx233_lcdif_dma_send(void *buf, unsigned width, unsigned height);
+
+#endif /* __LCDIF_IMX233_H__ */
diff --git a/firmware/target/arm/imx233/pinctrl-imx233.h b/firmware/target/arm/imx233/pinctrl-imx233.h
new file mode 100644
index 0000000000..291b5c8ff7
--- /dev/null
+++ b/firmware/target/arm/imx233/pinctrl-imx233.h
@@ -0,0 +1,109 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+
+#ifndef __PINCTRL_IMX233_H__
+#define __PINCTRL_IMX233_H__
+
+#include "cpu.h"
+
+#define HW_PINCTRL_BASE         0x80018000
+
+#define HW_PINCTRL_CTRL         (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x0))
+#define HW_PINCTRL_MUXSEL(i)    (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x100 + (i) * 0x10))
+#define HW_PINCTRL_DRIVE(i)     (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x200 + (i) * 0x10))
+#define HW_PINCTRL_PULL(i)      (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x400 + (i) * 0x10))
+#define HW_PINCTRL_DOUT(i)      (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x500 + (i) * 0x10))
+#define HW_PINCTRL_DIN(i)       (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x600 + (i) * 0x10))
+#define HW_PINCTRL_DOE(i)       (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x700 + (i) * 0x10))
+#define HW_PINCTRL_PIN2IRQ(i)   (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x800 + (i) * 0x10))
+#define HW_PINCTRL_IRQEN(i)     (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x900 + (i) * 0x10))
+#define HW_PINCTRL_IRQEN(i)     (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x900 + (i) * 0x10))
+#define HW_PINCTRL_IRQLEVEL(i)  (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xa00 + (i) * 0x10))
+#define HW_PINCTRL_IRQPOL(i)    (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xb00 + (i) * 0x10))
+#define HW_PINCTRL_IRQSTAT(i)   (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xc00 + (i) * 0x10))
+
+#define PINCTRL_FUNCTION_MAIN   0
+#define PINCTRL_FUNCTION_ALT1   1
+#define PINCTRL_FUNCTION_ALT2   2
+#define PINCTRL_FUNCTION_GPIO   3
+
+#define PINCTRL_DRIVE_4mA       0
+#define PINCTRL_DRIVE_8mA       1
+#define PINCTRL_DRIVE_12mA      2
+#define PINCTRL_DRIVE_16mA      3 /* not available on all pins */
+
+static inline void imx233_pinctrl_init(void)
+{
+    __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_CLKGATE;
+    __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_SFTRST;
+}
+
+static inline void imx233_set_pin_drive_strength(unsigned bank, unsigned pin, unsigned strength)
+{
+    __REG_CLR(HW_PINCTRL_DRIVE(4 * bank + pin / 8)) = 3 << (4 * (pin % 8));
+    __REG_SET(HW_PINCTRL_DRIVE(4 * bank + pin / 8)) = strength << (4 * (pin % 8));
+}
+
+static inline void imx233_enable_gpio_output(unsigned bank, unsigned pin, bool enable)
+{
+    if(enable)
+        __REG_SET(HW_PINCTRL_DOE(bank)) = 1 << pin;
+    else
+        __REG_CLR(HW_PINCTRL_DOE(bank)) = 1 << pin;
+}
+
+static inline void imx233_enable_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool enable)
+{
+    if(enable)
+        __REG_SET(HW_PINCTRL_DOE(bank)) = pin_mask;
+    else
+        __REG_CLR(HW_PINCTRL_DOE(bank)) = pin_mask;
+}
+
+static inline void imx233_set_gpio_output(unsigned bank, unsigned pin, bool value)
+{
+    if(value)
+        __REG_SET(HW_PINCTRL_DOUT(bank)) = 1 << pin;
+    else
+        __REG_CLR(HW_PINCTRL_DOUT(bank)) = 1 << pin;
+}
+
+static inline void imx233_set_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool value)
+{
+    if(value)
+        __REG_SET(HW_PINCTRL_DOUT(bank)) = pin_mask;
+    else
+        __REG_CLR(HW_PINCTRL_DOUT(bank)) = pin_mask;
+}
+
+static inline uint32_t imx233_get_gpio_input_mask(unsigned bank, uint32_t pin_mask)
+{
+    return HW_PINCTRL_DIN(bank) & pin_mask;
+}
+
+static inline void imx233_set_pin_function(unsigned bank, unsigned pin, unsigned function)
+{
+    __REG_CLR(HW_PINCTRL_MUXSEL(2 * bank + pin / 16)) = 3 << (2 * (pin % 16));
+    __REG_SET(HW_PINCTRL_MUXSEL(2 * bank + pin / 16)) = function << (2 * (pin % 16));
+}
+
+#endif /* __PINCTRL_IMX233_H__ */
diff --git a/firmware/target/arm/imx233/powermgmt-target.h b/firmware/target/arm/imx233/powermgmt-target.h
new file mode 100644
index 0000000000..d539a66d16
--- /dev/null
+++ b/firmware/target/arm/imx233/powermgmt-target.h
@@ -0,0 +1,30 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef POWERMGMT_TARGET_H
+#define POWERMGMT_TARGET_H
+
+#include "config.h"
+
+void powermgmt_init_target(void);
+void charging_algorithm_step(void);
+void charging_algorithm_close(void);
+
+#endif /*  POWERMGMT_TARGET_H */
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/adc-target.h b/firmware/target/arm/imx233/sansa-fuzeplus/adc-target.h
new file mode 100644
index 0000000000..e6b5152f5b
--- /dev/null
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/adc-target.h
@@ -0,0 +1,24 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _ADC_TARGET_H_
+#define _ADC_TARGET_H_
+
+#endif
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/backlight-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/backlight-fuzeplus.c
new file mode 100644
index 0000000000..0638e30aeb
--- /dev/null
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/backlight-fuzeplus.c
@@ -0,0 +1,66 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "system.h"
+#include "lcd.h"
+#include "backlight.h"
+#include "backlight-target.h"
+#include "pinctrl-imx233.h"
+
+void _backlight_set_brightness(int brightness)
+{
+    imx233_set_gpio_output(1, 28, false);
+    udelay(600);
+    while(brightness-- > 0)
+    {
+        imx233_set_gpio_output(1, 28, false);
+        imx233_set_gpio_output(1, 28, true);
+    }
+}
+
+bool _backlight_init(void)
+{
+    imx233_set_pin_function(1, 28, PINCTRL_FUNCTION_GPIO);
+    imx233_set_pin_drive_strength(1, 28, PINCTRL_DRIVE_8mA);
+    imx233_enable_gpio_output(1, 28, true);
+    imx233_set_gpio_output(1, 29, true);
+    udelay(600);
+    _backlight_set_brightness(100);
+    return true;
+}
+
+void _backlight_on(void)
+{
+#ifdef HAVE_LCD_ENABLE
+    lcd_enable(true); /* power on lcd + visible display */
+#endif
+    /* don't do anything special, the core will set the brightness */
+}
+
+void _backlight_off(void)
+{
+    /* there is no real on/off but we can set to 0 brightness */
+    _backlight_set_brightness(0);
+#ifdef HAVE_LCD_ENABLE
+    lcd_enable(false); /* power off visible display */
+#endif
+}
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/backlight-target.h b/firmware/target/arm/imx233/sansa-fuzeplus/backlight-target.h
new file mode 100644
index 0000000000..e3766965d8
--- /dev/null
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/backlight-target.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef BACKLIGHT_TARGET_H
+#define BACKLIGHT_TARGET_H
+
+bool _backlight_init(void);
+void _backlight_on(void);
+void _backlight_off(void);
+void _backlight_set_brightness(int brightness);
+
+#endif /* BACKLIGHT_TARGET_H */
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c
new file mode 100644
index 0000000000..7f37d67d43
--- /dev/null
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c
@@ -0,0 +1,30 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "button-target.h"
+
+void button_init_device(void)
+{
+}
+
+int button_read_device(void)
+{
+    return 0;
+}
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/button-target.h b/firmware/target/arm/imx233/sansa-fuzeplus/button-target.h
new file mode 100644
index 0000000000..b5d27bb176
--- /dev/null
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/button-target.h
@@ -0,0 +1,44 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _BUTTON_TARGET_H_
+#define _BUTTON_TARGET_H_
+
+#include <stdbool.h>
+#include "config.h"
+
+void button_init_device(void);
+int button_read_device(void);
+
+/* Main unit's buttons */
+#define BUTTON_POWER        0x00000001
+
+#define BUTTON_VOL_UP       0x00000002
+#define BUTTON_VOL_DOWN     0x00000004
+
+#define BUTTON_MAIN (BUTTON_VOL_UP|BUTTON_VOL_DOWN|BUTTON_POWER)
+
+#define BUTTON_REMOTE 0
+
+/* Software power-off */
+#define POWEROFF_BUTTON BUTTON_POWER
+#define POWEROFF_COUNT 10
+
+#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
new file mode 100644
index 0000000000..d6f8f5323b
--- /dev/null
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
@@ -0,0 +1,376 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (c) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include <string.h>
+#include "cpu.h"
+#include "system.h"
+#include "backlight-target.h"
+#include "lcd.h"
+#include "lcdif-imx233.h"
+#include "clkctrl-imx233.h"
+#include "pinctrl-imx233.h"
+
+#define logf(...)
+
+static enum lcd_kind_t
+{
+    LCD_KIND_7783 = 0x7783,
+    LCD_KIND_9325 = 0x9325,
+    LCD_KIND_OTHER = 0,
+} lcd_kind = LCD_KIND_OTHER;
+
+static void setup_parameters(void)
+{
+    imx233_lcdif_reset();
+    imx233_lcdif_set_lcd_databus_width(HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_18_BIT);
+    imx233_lcdif_set_word_length(HW_LCDIF_CTRL__WORD_LENGTH_18_BIT);
+    imx233_lcdif_set_timings(1, 2, 2, 2);
+}
+
+static void setup_lcd_pins(bool use_lcdif)
+{
+    if(use_lcdif)
+    {
+        imx233_set_pin_function(1, 25, PINCTRL_FUNCTION_GPIO); /* lcd_vsync */
+        imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_MAIN); /* lcd_cs */
+        imx233_set_pin_function(1, 22, PINCTRL_FUNCTION_GPIO); /* lcd_dotclk */
+        imx233_set_pin_function(1, 23, PINCTRL_FUNCTION_GPIO); /* lcd_enable */
+        imx233_set_pin_function(1, 24, PINCTRL_FUNCTION_GPIO); /* lcd_hsync */
+        imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_MAIN); /* lcd_reset */
+        imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_MAIN); /* lcd_rs */
+        imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */
+        imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */
+        imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */
+        __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */
+    }
+    else
+    {
+        
+        __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */
+        imx233_enable_gpio_output_mask(1, 0x3ffffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,dotclk,enable,hsync,vsync} */
+        imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */
+        imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */
+        imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_GPIO); /* lcd_rs */
+        imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_GPIO); /* lcd_wr */
+        imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_GPIO); /* lcd_cs */
+        imx233_set_pin_function(1, 22, PINCTRL_FUNCTION_GPIO); /* lcd_dotclk */
+        imx233_set_pin_function(1, 23, PINCTRL_FUNCTION_GPIO); /* lcd_enable */
+        imx233_set_pin_function(1, 24, PINCTRL_FUNCTION_GPIO); /* lcd_hsync */
+        imx233_set_pin_function(1, 25, PINCTRL_FUNCTION_GPIO); /* lcd_vsync */
+    }
+}
+
+static void setup_lcd_pins_i80(bool i80)
+{
+    if(i80)
+    {
+        imx233_set_pin_drive_strength(1, 19, PINCTRL_DRIVE_12mA); /* lcd_rs */
+        imx233_set_pin_drive_strength(1, 20, PINCTRL_DRIVE_12mA); /* lcd_wr */
+        imx233_set_pin_drive_strength(1, 21, PINCTRL_DRIVE_12mA); /* lcd_cs */
+        imx233_set_pin_drive_strength(1, 23, PINCTRL_DRIVE_12mA); /* lcd_enable */
+        imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_GPIO); /* lcd_rs */
+        imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_GPIO); /* lcd_wr */
+        imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_GPIO); /* lcd_cs */
+        imx233_set_pin_function(1, 23, PINCTRL_FUNCTION_GPIO); /* lcd_enable */
+        /* lcd_{rs,wr,cs,enable} */
+        imx233_enable_gpio_output_mask(1, (1 << 19) | (1 << 20) | (1 << 21) | (1 << 23), true);
+        imx233_set_gpio_output_mask(1, (1 << 19) | (1 << 20) | (1 << 21) | (1 << 23), true);
+
+        imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */
+        __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} as GPIO */
+        imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */
+        imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */
+        imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_GPIO); /* lcd_reset */
+        imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_GPIO); /* lcd_rs */
+    }
+    else
+    {
+        imx233_set_gpio_output_mask(1, (1 << 19) | (1 << 20) | (1 << 21) | (1 << 23), true);
+        imx233_set_pin_drive_strength(1, 19, PINCTRL_DRIVE_4mA); /* lcd_rs */
+        imx233_set_pin_drive_strength(1, 20, PINCTRL_DRIVE_4mA); /* lcd_wr */
+        imx233_set_pin_drive_strength(1, 21, PINCTRL_DRIVE_4mA); /* lcd_cs */
+        imx233_set_pin_drive_strength(1, 23, PINCTRL_DRIVE_4mA); /* lcd_enable */
+        imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_MAIN); /* lcd_rs */
+        imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */
+        imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_MAIN); /* lcd_cs */
+        imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */
+        __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} as lcd_d{0-15} */
+        imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */
+        imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */
+        imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_MAIN); /* lcd_reset */
+        imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_MAIN); /* lcd_rs */
+    }
+}
+
+static void common_lcd_enable(bool enable)
+{
+    imx233_lcdif_enable(enable);
+    setup_lcd_pins(enable); /* use GPIO pins when disable */
+}
+
+static void setup_lcdif(void)
+{
+    setup_parameters();
+    common_lcd_enable(true);
+    imx233_lcdif_enable_bus_master(true);
+    //imx233_lcdif_enable_irqs(HW_LCDIF__CUR_FRAME_DONE_IRQ);
+}
+
+static inline uint32_t encode_16_to_18(uint32_t a)
+{
+    return ((a & 0xff) << 1) | (((a >> 8) & 0xff) << 10);
+}
+
+static inline uint32_t decode_18_to_16(uint32_t a)
+{
+    return ((a >> 1) & 0xff) | ((a >> 2) & 0xff00);
+}
+
+static void setup_lcdif_clock(void)
+{
+    /* the LCD seems to works at 24Mhz, so use the xtal clock with no divider */
+    imx233_enable_clock(CLK_PIX, false);
+    imx233_set_clock_divisor(CLK_PIX, 1);
+    imx233_set_bypass_pll(CLK_PIX, true); /* use XTAL */
+    imx233_enable_clock(CLK_PIX, true);
+}
+
+static uint32_t i80_write_read_single(uint32_t data_out)
+{
+    imx233_set_gpio_output(1, 21, true); /* lcd_cs */
+    imx233_set_gpio_output(1, 19, true); /* lcd_rs */
+    imx233_set_gpio_output(1, 23, true); /* lcd_enable */
+    imx233_set_gpio_output(1, 20, true); /* lcd_wr */
+    imx233_enable_gpio_output_mask(1, 0x3ffff, true); /* lcd_d{0-17} */
+    udelay(2);
+    imx233_set_gpio_output(1, 19, false); /* lcd_rs */
+    udelay(1);
+    imx233_set_gpio_output(1, 21, false); /* lcd_cs */
+    udelay(1);
+    imx233_set_gpio_output(1, 20, false); /* lcd_wr */
+    udelay(1);
+    imx233_set_gpio_output_mask(1, data_out & 0x3ffff, true); /* lcd_d{0-17} */
+    udelay(1);
+    imx233_set_gpio_output(1, 20, true); /* lcd_wr */
+    udelay(3);
+    imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */
+    udelay(2);
+    imx233_set_gpio_output(1, 23, false); /* lcd_enable */
+    udelay(1);
+    imx233_set_gpio_output(1, 19, true); /* lcd_rs */
+    udelay(1);
+    imx233_set_gpio_output(1, 23, true); /* lcd_enable */
+    udelay(3);
+    imx233_set_gpio_output(1, 23, false); /* lcd_enable */
+    udelay(2);
+    uint32_t data_in = imx233_get_gpio_input_mask(1, 0x3ffff); /* lcd_d{0-17} */
+    udelay(1);
+    imx233_set_gpio_output(1, 23, true); /* lcd_enable */
+    udelay(1);
+    imx233_set_gpio_output(1, 21, true); /* lcd_cs */
+    udelay(1);
+    return data_in;
+}
+
+static void lcd_write_reg(uint32_t reg, uint32_t data)
+{
+    uint32_t old_reg = reg;
+    /* get back to 18-bit word length */
+    imx233_lcdif_set_word_length(HW_LCDIF_CTRL__WORD_LENGTH_18_BIT);
+    reg = encode_16_to_18(reg);
+    data = encode_16_to_18(data);
+    
+    imx233_lcdif_pio_send(false, 2, &reg);
+    if(old_reg != 0x22)
+        imx233_lcdif_pio_send(true, 2, &data);
+}
+
+static uint32_t lcd_read_reg(uint32_t reg)
+{
+    setup_lcd_pins_i80(true);
+    uint32_t data_in = i80_write_read_single(encode_16_to_18(reg));
+    setup_lcd_pins_i80(false);
+    lcd_write_reg(0x22, 0);
+    return decode_18_to_16(data_in);
+}
+
+static void lcd_init_seq_7783(void)
+{
+    __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
+    udelay(50);
+    __REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
+    udelay(10);
+    __REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RESET;
+    udelay(200);
+    lcd_write_reg(1, 0x100);
+    lcd_write_reg(2, 0x700);
+    lcd_write_reg(3, 0x1030);
+    lcd_write_reg(7, 0x121);
+    lcd_write_reg(8, 0x302);
+    lcd_write_reg(9, 0x200);
+    lcd_write_reg(0xa, 0);
+    lcd_write_reg(0x10, 0x790);
+    lcd_write_reg(0x11, 5);
+    lcd_write_reg(0x12, 0);
+    lcd_write_reg(0x13, 0);
+    udelay(100);
+    lcd_write_reg(0x10, 0x12b0);
+    udelay(100);
+    lcd_write_reg(0x11, 7);
+    udelay(100);
+    lcd_write_reg(0x12, 0x89);
+    lcd_write_reg(0x13, 0x1d00);
+    lcd_write_reg(0x29, 0x2f);
+    udelay(50);
+    lcd_write_reg(0x30, 0);
+    lcd_write_reg(0x31, 0x505);
+    lcd_write_reg(0x32, 0x205);
+    lcd_write_reg(0x35, 0x206);
+    lcd_write_reg(0x36, 0x408);
+    lcd_write_reg(0x37, 0);
+    lcd_write_reg(0x38, 0x504);
+    lcd_write_reg(0x39, 0x206);
+    lcd_write_reg(0x3c, 0x206);
+    lcd_write_reg(0x3d, 0x408);
+    lcd_write_reg(0x50, 0); /* left X ? */ 
+    lcd_write_reg(0x51, 0xef); /* right X ? */
+    lcd_write_reg(0x52, 0); /* top Y ? */
+    lcd_write_reg(0x53, 0x13f); /* bottom Y ? */
+    lcd_write_reg(0x20, 0); /* left X ? */ 
+    lcd_write_reg(0x21, 0); /* top Y ? */
+    lcd_write_reg(0x60, 0xa700);
+    lcd_write_reg(0x61, 1);
+    lcd_write_reg(0x90, 0x33);
+    lcd_write_reg(0x2b, 0xa);
+    lcd_write_reg(9, 0);
+    lcd_write_reg(7, 0x133);
+    udelay(50);
+    lcd_write_reg(0x22, 0);
+}
+
+static void lcd_init_seq_9325(void)
+{
+    
+}
+
+void lcd_init_device(void)
+{
+    setup_lcdif();
+    setup_lcdif_clock();
+    
+    for(int i = 0; i < 10; i++)
+    {
+        uint32_t kind = lcd_read_reg(0);
+        if(kind == LCD_KIND_7783 || kind == LCD_KIND_9325)
+        {
+            lcd_kind = kind;
+            break;
+        }
+        else
+        {
+            lcd_kind = LCD_KIND_OTHER;
+        }
+    }
+    udelay(5);
+    switch(lcd_kind)
+    {
+        case LCD_KIND_7783: lcd_init_seq_7783(); break;
+        case LCD_KIND_9325: lcd_init_seq_9325(); break;
+        default:
+            lcd_init_seq_7783(); break;
+    }
+}
+
+
+static void lcd_enable_7783(bool enable)
+{
+    if(!enable)
+    {
+        lcd_write_reg(7, 0x131);
+        udelay(50);
+        lcd_write_reg(7, 0x20);
+        udelay(50);
+        lcd_write_reg(0x10, 0x82);
+        udelay(50);
+    }
+    else
+    {
+        lcd_write_reg(0x11, 5);
+        lcd_write_reg(0x10, 0x12b0);
+        udelay(50);
+        lcd_write_reg(7, 0x11);
+        udelay(50);
+        lcd_write_reg(0x12, 0x89);
+        udelay(50);
+        lcd_write_reg(0x13, 0x1d00);
+        udelay(50);
+        lcd_write_reg(0x29, 0x2f);
+        udelay(50);
+        lcd_write_reg(0x2b, 0xa);
+        lcd_write_reg(7, 0x133);
+        udelay(50);
+        lcd_write_reg(0x22, 0);
+    }
+}
+
+static void lcd_enable_9325(bool enable)
+{
+    (void) enable;
+}
+
+void lcd_enable(bool enable)
+{
+    if(enable)
+        common_lcd_enable(true);
+    switch(lcd_kind)
+    {
+        case LCD_KIND_7783: lcd_enable_7783(enable); break;
+        case LCD_KIND_9325: lcd_enable_9325(enable); break;
+        default: lcd_enable_7783(enable); break;
+    }
+    if(!enable)
+        common_lcd_enable(false);
+}
+
+void lcd_update(void)
+{
+    lcd_write_reg(0x50, 0);
+    lcd_write_reg(0x51, LCD_WIDTH - 1);
+    lcd_write_reg(0x52, 0);
+    lcd_write_reg(0x53, LCD_HEIGHT - 1);
+    lcd_write_reg(0x20, 0);
+    lcd_write_reg(0x21, 0);
+    lcd_write_reg(0x22, 0);
+    imx233_lcdif_wait_ready();
+    imx233_lcdif_set_word_length(HW_LCDIF_CTRL__WORD_LENGTH_16_BIT);
+    imx233_lcdif_set_byte_packing_format(0xf); /* two pixels per 32-bit word */
+    imx233_lcdif_set_data_format(false, false, false); /* RGB565, don't care, don't care */
+    imx233_lcdif_dma_send(lcd_framebuffer, LCD_WIDTH, LCD_HEIGHT);
+    imx233_lcdif_wait_ready();
+}
+
+void lcd_update_rect(int x, int y, int width, int height)
+{
+    (void) x;
+    (void) y;
+    (void) width;
+    (void) height;
+    lcd_update();
+}
diff --git a/firmware/target/arm/imx233/sd-imx233.c b/firmware/target/arm/imx233/sd-imx233.c
new file mode 100644
index 0000000000..eec1ce14db
--- /dev/null
+++ b/firmware/target/arm/imx233/sd-imx233.c
@@ -0,0 +1,48 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "sd.h"
+
+int sd_init(void)
+{
+    return -1;
+}
+
+int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int count,
+                     void* buf)
+{
+    IF_MD((void) drive);
+    (void) start;
+    (void) count;
+    (void) buf;
+    return -1;
+}
+
+int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
+                     const void* buf)
+{
+    IF_MD((void) drive);
+    (void) start;
+    (void) count;
+    (void) buf;
+    return -1;
+}
+
+
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c
new file mode 100644
index 0000000000..bcccce194c
--- /dev/null
+++ b/firmware/target/arm/imx233/system-imx233.c
@@ -0,0 +1,191 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "kernel.h"
+#include "system.h"
+#include "gcc_extensions.h"
+#include "system-target.h"
+#include "cpu.h"
+#include "clkctrl-imx233.h"
+#include "pinctrl-imx233.h"
+#include "timrot-imx233.h"
+#include "lcd.h"
+#include "backlight-target.h"
+
+#define HW_POWER_BASE           0x80044000
+
+#define HW_POWER_RESET          (*(volatile uint32_t *)(HW_POWER_BASE + 0x100))
+#define HW_POWER_RESET__UNLOCK  0x3E770000
+#define HW_POWER_RESET__PWD     0x1
+
+#define HW_ICOLL_BASE           0x80000000
+
+#define HW_ICOLL_VECTOR         (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x0))
+
+#define HW_ICOLL_LEVELACK       (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x10))
+#define HW_ICOLL_LEVELACK__LEVEL0   0x1
+
+#define HW_ICOLL_CTRL           (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x20))
+#define HW_ICOLL_CTRL__IRQ_FINAL_ENABLE (1 << 16)
+#define HW_ICOLL_CTRL__ARM_RSE_MODE     (1 << 18)
+
+#define HW_ICOLL_VBASE          (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x40))
+#define HW_ICOLL_INTERRUPT(i)   (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x120 + (i) * 0x10))
+#define HW_ICOLL_INTERRUPT__PRIORITY_BM 0x3
+#define HW_ICOLL_INTERRUPT__ENABLE      0x4
+#define HW_ICOLL_INTERRUPT__SOFTIRQ     0x8
+#define HW_ICOLL_INTERRUPT__ENFIQ       0x10
+
+#define default_interrupt(name) \
+    extern __attribute__((weak, alias("UIRQ"))) void name(void)
+
+static void UIRQ (void) __attribute__((interrupt ("IRQ")));
+void irq_handler(void) __attribute__((interrupt("IRQ")));
+void fiq_handler(void) __attribute__((interrupt("FIQ")));
+
+default_interrupt(INT_USB_CTRL);
+default_interrupt(INT_TIMER0);
+default_interrupt(INT_TIMER1);
+default_interrupt(INT_TIMER2);
+default_interrupt(INT_TIMER3);
+default_interrupt(INT_LCDIF_DMA);
+default_interrupt(INT_LCDIF_ERROR);
+
+typedef void (*isr_t)(void);
+
+static isr_t isr_table[INT_SRC_NR_SOURCES] =
+{
+    [INT_SRC_USB_CTRL] = INT_USB_CTRL,
+    [INT_SRC_TIMER(0)] = INT_TIMER0,
+    [INT_SRC_TIMER(1)] = INT_TIMER1,
+    [INT_SRC_TIMER(2)] = INT_TIMER2,
+    [INT_SRC_TIMER(3)] = INT_TIMER3,
+    [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA,
+    [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR,
+};
+
+static void UIRQ(void)
+{
+    panicf("Unhandled IRQ %02X",
+        (unsigned int)(HW_ICOLL_VECTOR - (uint32_t)isr_table) / 4);
+}
+
+void irq_handler(void)
+{
+    HW_ICOLL_VECTOR = HW_ICOLL_VECTOR; /* notify icoll that we entered ISR */
+    (*(isr_t *)HW_ICOLL_VECTOR)();
+    /* acknowledge completion of IRQ (all use the same priority 0 */
+    HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0;
+}
+
+void fiq_handler(void)
+{
+}
+
+static void imx233_chip_reset(void)
+{
+    HW_CLKCTRL_RESET = HW_CLKCTRL_RESET_CHIP;
+}
+
+void system_reboot(void)
+{
+    _backlight_off();
+
+    disable_irq();
+
+    /* use watchdog to reset */
+    imx233_chip_reset();
+    while(1);
+}
+
+void system_exception_wait(void)
+{
+    /* what is this supposed to do ? */
+}
+
+void imx233_enable_interrupt(int src, bool enable)
+{
+    if(enable)
+        __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE;
+    else
+        __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE;
+}
+
+void imx233_softirq(int src, bool enable)
+{
+    if(enable)
+        __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__SOFTIRQ;
+    else
+        __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__SOFTIRQ;
+}
+
+void system_init(void)
+{
+    /* disable all interrupts */
+    for(int i = 0; i < INT_SRC_NR_SOURCES; i++)
+    {
+        /* priority = 0, disable, disable fiq */
+        HW_ICOLL_INTERRUPT(i) = 0;
+    }
+    /* setup vbase as isr_table */
+    HW_ICOLL_VBASE = (uint32_t)&isr_table;
+    /* enable final irq bit */
+    __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE;
+
+    imx233_pinctrl_init();
+    imx233_timrot_init();
+}
+
+void power_off(void)
+{
+    /* power down */
+    HW_POWER_RESET = HW_POWER_RESET__UNLOCK | HW_POWER_RESET__PWD;
+    while(1);
+}
+
+bool imx233_us_elapsed(uint32_t ref, unsigned us_delay)
+{
+    uint32_t cur = HW_DIGCTL_MICROSECONDS;
+    if(ref + us_delay <= ref)
+        return !(cur > ref) && !(cur < (ref + us_delay));
+    else
+        return (cur < ref) || cur >= (ref + us_delay);
+}
+
+void imx233_reset_block(volatile uint32_t *block_reg)
+{
+    __REG_CLR(*block_reg) = __BLOCK_SFTRST;
+    while(*block_reg & __BLOCK_SFTRST);
+    __REG_CLR(*block_reg) = __BLOCK_CLKGATE;
+    __REG_SET(*block_reg) = __BLOCK_SFTRST;
+    while(!(*block_reg & __BLOCK_CLKGATE));
+    __REG_CLR(*block_reg) = __BLOCK_SFTRST;
+    while(*block_reg & __BLOCK_SFTRST);
+    __REG_CLR(*block_reg) = __BLOCK_CLKGATE;
+    while(*block_reg & __BLOCK_CLKGATE);
+}
+
+void udelay(unsigned us)
+{
+    uint32_t ref = HW_DIGCTL_MICROSECONDS;
+    while(!imx233_us_elapsed(ref, us));
+}
+
diff --git a/firmware/target/arm/imx233/system-target.h b/firmware/target/arm/imx233/system-target.h
new file mode 100644
index 0000000000..675adb448b
--- /dev/null
+++ b/firmware/target/arm/imx233/system-target.h
@@ -0,0 +1,53 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef SYSTEM_TARGET_H
+#define SYSTEM_TARGET_H
+
+#include "system-arm.h"
+#include "mmu-arm.h"
+#include "panic.h"
+
+#include "clock-target.h" /* CPUFREQ_* are defined here */
+
+#define HW_DIGCTL_BASE          0x8001C000
+#define HW_DIGCTL_MICROSECONDS  (*(volatile uint32_t *)(HW_DIGCTL_BASE + 0xC0))
+
+#define INT_SRC_USB_CTRL    11
+#define INT_SRC_TIMER(nr)   (28 + (nr))
+#define INT_SRC_LCDIF_DMA   45
+#define INT_SRC_LCDIF_ERROR 46
+#define INT_SRC_NR_SOURCES  66
+
+void imx233_enable_interrupt(int src, bool enable);
+void imx233_softirq(int src, bool enable);
+void udelay(unsigned us);
+bool imx233_us_elapsed(uint32_t ref, unsigned us_delay);
+void imx233_reset_block(volatile uint32_t *block_reg);
+void power_off(void);
+
+void udelay(unsigned usecs);
+
+static inline void mdelay(unsigned msecs)
+{
+    udelay(1000 * msecs);
+}
+
+#endif /* SYSTEM_TARGET_H */
diff --git a/firmware/target/arm/imx233/timrot-imx233.c b/firmware/target/arm/imx233/timrot-imx233.c
new file mode 100644
index 0000000000..64a7c63f24
--- /dev/null
+++ b/firmware/target/arm/imx233/timrot-imx233.c
@@ -0,0 +1,76 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "timrot-imx233.h"
+#include "clkctrl-imx233.h"
+
+imx233_timer_fn_t timer_fns[4];
+
+#define define_timer_irq(nr) \
+void INT_TIMER##nr(void) \
+{ \
+    if(timer_fns[nr]) \
+        timer_fns[nr](); \
+    __REG_CLR(HW_TIMROT_TIMCTRL(nr)) = HW_TIMROT_TIMCTRL__IRQ; \
+}
+
+define_timer_irq(0)
+define_timer_irq(1)
+define_timer_irq(2)
+define_timer_irq(3)
+
+void imx233_setup_timer(unsigned timer_nr, bool reload, unsigned count,
+    unsigned src, unsigned prescale, bool polarity, imx233_timer_fn_t fn)
+{
+    timer_fns[timer_nr] = fn;
+    
+    HW_TIMROT_TIMCTRL(timer_nr) = src | prescale;
+    if(polarity)
+        __REG_SET(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__POLARITY;
+    if(reload)
+    {
+        __REG_SET(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__RELOAD;
+        /* manual says count - 1 for reload timers */
+        HW_TIMROT_TIMCOUNT(timer_nr) = count - 1;
+    }
+    else
+        HW_TIMROT_TIMCOUNT(timer_nr) = count;
+    /* only enable interrupt if function is set */
+    if(fn != NULL)
+    {
+        /* enable interrupt */
+        imx233_enable_interrupt(INT_SRC_TIMER(timer_nr), true);
+        /* clear irq bit and enable */
+        __REG_CLR(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__IRQ;
+        __REG_SET(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__IRQ_EN;
+    }
+    else
+        imx233_enable_interrupt(INT_SRC_TIMER(timer_nr), false);
+    /* finally update */
+    __REG_SET(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__UPDATE;
+}
+
+void imx233_timrot_init(void)
+{
+    __REG_CLR(HW_TIMROT_ROTCTRL) = __BLOCK_CLKGATE;
+    __REG_CLR(HW_TIMROT_ROTCTRL) = __BLOCK_SFTRST;
+    /* enable xtal path to timrot */
+    imx233_enable_timrot_xtal_clk32k(true);
+}
diff --git a/firmware/target/arm/imx233/timrot-imx233.h b/firmware/target/arm/imx233/timrot-imx233.h
new file mode 100644
index 0000000000..792ab767ac
--- /dev/null
+++ b/firmware/target/arm/imx233/timrot-imx233.h
@@ -0,0 +1,57 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef TIMROT_IMX233_H
+#define TIMROT_IMX233_H
+
+#include "system.h"
+#include "cpu.h"
+
+#define HW_TIMROT_BASE          0x80068000
+
+#define HW_TIMROT_ROTCTRL       (*(volatile uint32_t *)(HW_TIMROT_BASE + 0x0))
+
+#define HW_TIMROT_ROTCOUNT      (*(volatile uint32_t *)(HW_TIMROT_BASE + 0x10))
+
+#define HW_TIMROT_TIMCTRL(i)    (*(volatile uint32_t *)(HW_TIMROT_BASE + 0x20 + (i) * 0x20))
+#define HW_TIMROT_TIMCTRL__IRQ      (1 << 15)
+#define HW_TIMROT_TIMCTRL__IRQ_EN   (1 << 14)
+#define HW_TIMROT_TIMCTRL__POLARITY (1 << 8)
+#define HW_TIMROT_TIMCTRL__UPDATE   (1 << 7)
+#define HW_TIMROT_TIMCTRL__RELOAD   (1 << 6)
+#define HW_TIMROT_TIMCTRL__PRESCALE_1   (0 << 4)
+#define HW_TIMROT_TIMCTRL__PRESCALE_2   (1 << 4)
+#define HW_TIMROT_TIMCTRL__PRESCALE_4   (2 << 4)
+#define HW_TIMROT_TIMCTRL__PRESCALE_8   (3 << 4)
+#define HW_TIMROT_TIMCTRL__SELECT_32KHZ_XTAL    8
+#define HW_TIMROT_TIMCTRL__SELECT_8KHZ_XTAL     9
+#define HW_TIMROT_TIMCTRL__SELECT_4KHZ_XTAL     10
+#define HW_TIMROT_TIMCTRL__SELECT_1KHZ_XTAL     11
+#define HW_TIMROT_TIMCTRL__SELECT_TICK_ALWAYS   12
+
+#define HW_TIMROT_TIMCOUNT(i)   (*(volatile uint32_t *)(HW_TIMROT_BASE + 0x30 + (i) * 0x20))
+
+typedef void (*imx233_timer_fn_t)(void);
+
+void imx233_timrot_init(void);
+void imx233_setup_timer(unsigned timer_nr, bool reload, unsigned count,
+    unsigned src, unsigned prescale, bool polarity, imx233_timer_fn_t fn);
+
+#endif /* TIMROT_IMX233_H */