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author | Jack Halpin <jack.halpin@gmail.com> | 2009-12-17 19:57:08 +0000 |
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committer | Jack Halpin <jack.halpin@gmail.com> | 2009-12-17 19:57:08 +0000 |
commit | 5a4ca2f04d21322a81a776ac823040e385158204 (patch) | |
tree | 02a120cc754225efa5a382aac0f1b8d92bf3fddc /firmware/target/arm/as3525 | |
parent | 7bce743218324bd565ffcbe161cb04c90bc9e2e3 (diff) |
Sansa AMS: Fix Red. Write delay is not included for non HAVE_MULTIDRIVE.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24055 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525')
-rw-r--r-- | firmware/target/arm/as3525/ata_sd_as3525.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c index 6513750652..8d0dc042b9 100644 --- a/firmware/target/arm/as3525/ata_sd_as3525.c +++ b/firmware/target/arm/as3525/ata_sd_as3525.c @@ -752,11 +752,13 @@ static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL); /*Small delay for writes prevents data crc failures at lower freqs*/ +#ifdef HAVE_MULTIDRIVE if((drive == SD_SLOT_AS3525) && !hs_card) { int write_delay = 125; while(write_delay--); } +#endif } else dma_enable_channel(0, MCI_FIFO(drive), dma_buf, |