diff options
| author | Bertrik Sikken <bertrik@sikken.nl> | 2010-01-10 14:24:45 +0000 |
|---|---|---|
| committer | Bertrik Sikken <bertrik@sikken.nl> | 2010-01-10 14:24:45 +0000 |
| commit | ba9040a82b15c18b242134474a6e1d571ed686a3 (patch) | |
| tree | 244e940c6000ede86271f94406a344bfeaeb899f /firmware/target/arm/as3525/system-as3525.c | |
| parent | 25972b63e63fcf42b5f0d17814272385daa96c2f (diff) | |
Sansa AMS: allow use of PLL B for more accurate audio sample rate (0.04% instead 0.15% error)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24211 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
| -rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 75539ba8d7..13b406a6b8 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c @@ -285,8 +285,15 @@ void system_init(void) CGU_PROC = 0; /* fclk 24 MHz */ CGU_PERI &= ~0x7f; /* pclk 24 MHz */ + CGU_PLLASUP = 0; /* enable PLLA */ CGU_PLLA = AS3525_PLLA_SETTING; while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ + +#if (AS3525_MCLK_SEL == AS3525_CLK_PLLB) + CGU_PLLBSUP = 0; /* enable PLLB */ + CGU_PLLB = AS3525_PLLB_SETTING; + while(!(CGU_INTCTRL & (1<<1))); /* wait until PLLB is locked */ +#endif /* Set FCLK frequency */ CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | |