diff options
author | Bertrik Sikken <bertrik@sikken.nl> | 2010-11-09 21:53:44 +0000 |
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committer | Bertrik Sikken <bertrik@sikken.nl> | 2010-11-09 21:53:44 +0000 |
commit | 19c048344d80fee1c2cd913aecf7162d2d457beb (patch) | |
tree | 225b182ec287d450030a8ca0a36b3f88d626ce08 /firmware/target/arm/as3525/pcm-as3525.c | |
parent | ebcfb13a86b0d1bebd5ffd5ae91f36170a5791e7 (diff) |
Apply FS#11729 - Remove unneeded I2SIN clock configuration for AS3525 and AS3525v2
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28541 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/pcm-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/pcm-as3525.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c index 720f615ba9..e0cb9aa441 100644 --- a/firmware/target/arm/as3525/pcm-as3525.c +++ b/firmware/target/arm/as3525/pcm-as3525.c @@ -177,6 +177,8 @@ void pcm_dma_apply_settings(void) cgu_audio |= (AS3525_MCLK_SEL << 0); /* set i2sout MCLK_SEL */ cgu_audio &= ~(0x1ff << 2); /* clear i2sout divider */ cgu_audio |= mclk_divider() << 2; /* set new i2sout divider */ + cgu_audio &= ~(1 << 23); /* clear I2SI_MCLK_EN */ + cgu_audio &= ~(1 << 24); /* clear I2SI_MCLK2PAD_EN */ CGU_AUDIO = cgu_audio; /* write back register */ } @@ -338,7 +340,7 @@ void pcm_rec_dma_stop(void) I2SIN_CONTROL &= ~(1<<11); /* disable dma */ - CGU_AUDIO &= ~((1<<23)|(1<<11)); + CGU_AUDIO &= ~(1<<11); bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE | CGU_I2SOUT_APB_CLOCK_ENABLE); } @@ -357,7 +359,7 @@ void pcm_rec_dma_start(void *addr, size_t size) bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE | CGU_I2SOUT_APB_CLOCK_ENABLE); - CGU_AUDIO |= ((1<<23)|(1<<11)); + CGU_AUDIO |= (1<<11); I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */ @@ -374,13 +376,6 @@ void pcm_rec_dma_close(void) void pcm_rec_dma_init(void) { - int cgu_audio = CGU_AUDIO; /* read register */ - cgu_audio &= ~(3 << 12); /* clear i2sin MCLK_SEL */ - cgu_audio |= (AS3525_MCLK_SEL << 12); /* set i2sin MCLK_SEL */ - cgu_audio &= ~(0x1ff << 14); /* clear i2sin divider */ - cgu_audio |= mclk_divider() << 14; /* set new i2sin divider */ - CGU_AUDIO = cgu_audio; /* write back register */ - /* i2c clk src = I2SOUTIF, sdata src = AFE, * data valid at positive edge of SCLK */ I2SIN_CONTROL = (1<<2); |