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| author | Jack Halpin <jack.halpin@gmail.com> | 2009-05-29 00:06:13 +0000 |
|---|---|---|
| committer | Jack Halpin <jack.halpin@gmail.com> | 2009-05-29 00:06:13 +0000 |
| commit | b4b7c7501e61b0c89233d8a43c8557053b859ddf (patch) | |
| tree | dabede2983cf1dfdabc90de1d03113408d74f553 /firmware/target/arm/as3525/clock-target.h | |
| parent | acbbf9361538bb1fc2738a5994359aacdc9d2f43 (diff) | |
AMSSansa: Change comment to describe FCLK as input more accurately
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21124 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/clock-target.h')
| -rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 7dab0378ad..c9b2ceb9a4 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h @@ -49,7 +49,7 @@ #define AS3525_CLK_MAIN 0 #define AS3525_CLK_PLLA 1 //#define AS3525_CLK_PLLB 2 -#define AS3525_CLK_FCLK 3 /* for synchronous bus only */ +#define AS3525_CLK_FCLK 3 /* Available as PCLK input only */ /* PLL frequencies and settings*/ |